Searched refs:CY_DMA_RETRIG_16CYC (Results 1 – 1 of 1) sorted by relevance
308 CY_DMA_RETRIG_16CYC = 2UL, /**< Retrigger after 16 Clk_Slow cycles. */ enumerator346 (CY_DMA_RETRIG_16CYC == (retrig)) || \1924 #define CY_DMA_RETDIG_16CYC (CY_DMA_RETRIG_16CYC)