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Searched refs:P1_0 (Results 1 – 25 of 28) sorted by relevance

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/hal_infineon-3.4.0/mtb-hal-cat1/COMPONENT_PSOC6HAL/COMPONENT_CAT1B/source/pin_packages/
Dcyhal_cyw20829_40_qfn.c81 {0u, 5u, P1_0, P1_0_KEYSCAN_KS_ROW5},
133 {0u, 0u, P1_0, P1_0_PERI_TR_IO_OUTPUT0},
174 {1u, 0u, P1_0, P1_0_SCB1_SPI_SELECT0},
217 {1u, 0u, P1_0, P1_0_SCB1_SPI_SELECT0},
239 {1u, 0u, P1_0, P1_0_SCB1_UART_CTS},
317 {0u, 1u, P1_0, P1_0_TCPWM0_LINE_COMPL1},
318 {1u, 2u, P1_0, P1_0_TCPWM0_LINE_COMPL258},
353 {0u, 0u, P1_0, P1_0_TDM_TDM_TX_FSYNC0},
Dcyhal_cyw20829_56_qfn.c104 {0u, 5u, P1_0, P1_0_KEYSCAN_KS_ROW5},
164 {0u, 0u, P1_0, P1_0_PERI_TR_IO_OUTPUT0},
209 {1u, 0u, P1_0, P1_0_SCB1_SPI_SELECT0},
260 {1u, 0u, P1_0, P1_0_SCB1_SPI_SELECT0},
288 {1u, 0u, P1_0, P1_0_SCB1_UART_CTS},
385 {0u, 1u, P1_0, P1_0_TCPWM0_LINE_COMPL1},
386 {1u, 2u, P1_0, P1_0_TCPWM0_LINE_COMPL258},
429 {0u, 0u, P1_0, P1_0_TDM_TDM_TX_FSYNC0},
/hal_infineon-3.4.0/mtb-hal-cat1/COMPONENT_PSOC6HAL/COMPONENT_CAT1A/source/pin_packages/
Dcyhal_psoc6_01_80_wlcsp.c247 {0u, 2u, P1_0, P1_0_PERI_TR_IO_INPUT2},
283 {7u, 0u, P1_0, P1_0_SCB7_I2C_SCL},
349 {7u, 0u, P1_0, P1_0_SCB7_SPI_MOSI},
444 {7u, 0u, P1_0, P1_0_SCB7_SPI_MOSI},
533 {7u, 0u, P1_0, P1_0_SCB7_UART_RX},
633 {0u, 3u, P1_0, P1_0_TCPWM0_LINE3},
634 {1u, 3u, P1_0, P1_0_TCPWM1_LINE3},
Dcyhal_psoc6_01_104_m_csp_ble_usb.c249 {0u, 2u, P1_0, P1_0_PERI_TR_IO_INPUT2},
287 {7u, 0u, P1_0, P1_0_SCB7_I2C_SCL},
357 {7u, 0u, P1_0, P1_0_SCB7_SPI_MOSI},
460 {7u, 0u, P1_0, P1_0_SCB7_SPI_MOSI},
557 {7u, 0u, P1_0, P1_0_SCB7_UART_RX},
659 {0u, 3u, P1_0, P1_0_TCPWM0_LINE3},
660 {1u, 3u, P1_0, P1_0_TCPWM1_LINE3},
Dcyhal_psoc6_01_104_m_csp_ble.c249 {0u, 2u, P1_0, P1_0_PERI_TR_IO_INPUT2},
287 {7u, 0u, P1_0, P1_0_SCB7_I2C_SCL},
357 {7u, 0u, P1_0, P1_0_SCB7_SPI_MOSI},
461 {7u, 0u, P1_0, P1_0_SCB7_SPI_MOSI},
560 {7u, 0u, P1_0, P1_0_SCB7_UART_RX},
662 {0u, 3u, P1_0, P1_0_TCPWM0_LINE3},
663 {1u, 3u, P1_0, P1_0_TCPWM1_LINE3},
Dcyhal_psoc6_01_116_bga_ble.c251 {0u, 2u, P1_0, P1_0_PERI_TR_IO_INPUT2},
289 {7u, 0u, P1_0, P1_0_SCB7_I2C_SCL},
360 {7u, 0u, P1_0, P1_0_SCB7_SPI_MOSI},
470 {7u, 0u, P1_0, P1_0_SCB7_SPI_MOSI},
575 {7u, 0u, P1_0, P1_0_SCB7_UART_RX},
677 {0u, 3u, P1_0, P1_0_TCPWM0_LINE3},
678 {1u, 3u, P1_0, P1_0_TCPWM1_LINE3},
Dcyhal_psoc6_01_116_bga_usb.c251 {0u, 2u, P1_0, P1_0_PERI_TR_IO_INPUT2},
289 {7u, 0u, P1_0, P1_0_SCB7_I2C_SCL},
360 {7u, 0u, P1_0, P1_0_SCB7_SPI_MOSI},
467 {7u, 0u, P1_0, P1_0_SCB7_SPI_MOSI},
568 {7u, 0u, P1_0, P1_0_SCB7_UART_RX},
670 {0u, 3u, P1_0, P1_0_TCPWM0_LINE3},
671 {1u, 3u, P1_0, P1_0_TCPWM1_LINE3},
Dcyhal_psoc6_02_100_wlcsp.c137 {0u, 2u, P1_0, P1_0_PERI_TR_IO_INPUT2},
177 {7u, 0u, P1_0, P1_0_SCB7_I2C_SCL},
259 {7u, 0u, P1_0, P1_0_SCB7_SPI_MOSI},
371 {7u, 0u, P1_0, P1_0_SCB7_SPI_MOSI},
484 {7u, 0u, P1_0, P1_0_SCB7_UART_RX},
659 {0u, 3u, P1_0, P1_0_TCPWM0_LINE3},
660 {1u, 3u, P1_0, P1_0_TCPWM1_LINE3},
Dcyhal_psoc6_01_124_bga_sip.c253 {0u, 2u, P1_0, P1_0_PERI_TR_IO_INPUT2},
291 {7u, 0u, P1_0, P1_0_SCB7_I2C_SCL},
363 {7u, 0u, P1_0, P1_0_SCB7_SPI_MOSI},
478 {7u, 0u, P1_0, P1_0_SCB7_SPI_MOSI},
589 {7u, 0u, P1_0, P1_0_SCB7_UART_RX},
691 {0u, 3u, P1_0, P1_0_TCPWM0_LINE3},
692 {1u, 3u, P1_0, P1_0_TCPWM1_LINE3},
Dcyhal_psoc6_02_124_bga.c139 {0u, 2u, P1_0, P1_0_PERI_TR_IO_INPUT2},
183 {7u, 0u, P1_0, P1_0_SCB7_I2C_SCL},
274 {7u, 0u, P1_0, P1_0_SCB7_SPI_MOSI},
404 {7u, 0u, P1_0, P1_0_SCB7_SPI_MOSI},
537 {7u, 0u, P1_0, P1_0_SCB7_UART_RX},
719 {0u, 3u, P1_0, P1_0_TCPWM0_LINE3},
720 {1u, 3u, P1_0, P1_0_TCPWM1_LINE3},
Dcyhal_psoc6_02_128_tqfp.c139 {0u, 2u, P1_0, P1_0_PERI_TR_IO_INPUT2},
183 {7u, 0u, P1_0, P1_0_SCB7_I2C_SCL},
275 {7u, 0u, P1_0, P1_0_SCB7_SPI_MOSI},
407 {7u, 0u, P1_0, P1_0_SCB7_SPI_MOSI},
543 {7u, 0u, P1_0, P1_0_SCB7_UART_RX},
725 {0u, 3u, P1_0, P1_0_TCPWM0_LINE3},
726 {1u, 3u, P1_0, P1_0_TCPWM1_LINE3},
Dcyhal_psoc6_01_124_bga.c253 {0u, 2u, P1_0, P1_0_PERI_TR_IO_INPUT2},
297 {7u, 0u, P1_0, P1_0_SCB7_I2C_SCL},
380 {7u, 0u, P1_0, P1_0_SCB7_SPI_MOSI},
510 {7u, 0u, P1_0, P1_0_SCB7_SPI_MOSI},
635 {7u, 0u, P1_0, P1_0_SCB7_UART_RX},
743 {0u, 3u, P1_0, P1_0_TCPWM0_LINE3},
744 {1u, 3u, P1_0, P1_0_TCPWM1_LINE3},
/hal_infineon-3.4.0/XMCLib/drivers/inc/
Dxmc1_gpio_map.h82 #define P1_0 XMC_GPIO_PORT1, 0 macro
178 #define P1_0 XMC_GPIO_PORT1, 0 macro
370 #define P1_0 XMC_GPIO_PORT1, 0 macro
494 #define P1_0 XMC_GPIO_PORT1, 0 macro
708 #define P1_0 XMC_GPIO_PORT1, 0 macro
909 #define P1_0 XMC_GPIO_PORT1, 0 macro
1065 #define P1_0 XMC_GPIO_PORT1, 0 macro
1257 #define P1_0 XMC_GPIO_PORT1, 0 macro
1369 #define P1_0 XMC_GPIO_PORT1, 0 macro
1594 #define P1_0 XMC_GPIO_PORT1, 0 macro
[all …]
Dxmc4_gpio_map.h92 #define P1_0 XMC_GPIO_PORT1, 0 macro
252 #define P1_0 XMC_GPIO_PORT1, 0 macro
366 #define P1_0 XMC_GPIO_PORT1, 0 macro
520 #define P1_0 XMC_GPIO_PORT1, 0 macro
629 #define P1_0 XMC_GPIO_PORT1, 0 macro
756 #define P1_0 XMC_GPIO_PORT1, 0 macro
849 #define P1_0 XMC_GPIO_PORT1, 0 macro
1009 #define P1_0 XMC_GPIO_PORT1, 0 macro
1124 #define P1_0 XMC_GPIO_PORT1, 0 macro
1397 #define P1_0 XMC_GPIO_PORT1, 0 macro
[all …]
/hal_infineon-3.4.0/mtb-hal-cat1/COMPONENT_PSOC6HAL/COMPONENT_CAT1B/include/pin_packages/
Dcyhal_cyw20829_40_qfn.h58 P1_0 = CYHAL_GET_GPIO(CYHAL_PORT_1, 0), //!< Port 1 Pin 0 enumerator
Dcyhal_cyw20829_56_qfn.h62 P1_0 = CYHAL_GET_GPIO(CYHAL_PORT_1, 0), //!< Port 1 Pin 0 enumerator
/hal_infineon-3.4.0/mtb-hal-cat1/COMPONENT_PSOC6HAL/COMPONENT_CAT1A/include/pin_packages/
Dcyhal_psoc6_04_80_tqfp.h62 P1_0 = CYHAL_GET_GPIO(CYHAL_PORT_1, 0), //!< Port 1 Pin 0 enumerator
Dcyhal_psoc6_02_100_wlcsp.h62 P1_0 = CYHAL_GET_GPIO(CYHAL_PORT_1, 0), //!< Port 1 Pin 0 enumerator
Dcyhal_psoc6_01_104_m_csp_ble.h62 P1_0 = CYHAL_GET_GPIO(CYHAL_PORT_1, 0), //!< Port 1 Pin 0 enumerator
Dcyhal_psoc6_01_104_m_csp_ble_usb.h62 P1_0 = CYHAL_GET_GPIO(CYHAL_PORT_1, 0), //!< Port 1 Pin 0 enumerator
Dcyhal_psoc6_01_116_bga_ble.h62 P1_0 = CYHAL_GET_GPIO(CYHAL_PORT_1, 0), //!< Port 1 Pin 0 enumerator
Dcyhal_psoc6_01_116_bga_usb.h62 P1_0 = CYHAL_GET_GPIO(CYHAL_PORT_1, 0), //!< Port 1 Pin 0 enumerator
Dcyhal_psoc6_01_80_wlcsp.h62 P1_0 = CYHAL_GET_GPIO(CYHAL_PORT_1, 0), //!< Port 1 Pin 0 enumerator
Dcyhal_psoc6_02_124_bga.h62 P1_0 = CYHAL_GET_GPIO(CYHAL_PORT_1, 0), //!< Port 1 Pin 0 enumerator
Dcyhal_psoc6_02_128_tqfp.h62 P1_0 = CYHAL_GET_GPIO(CYHAL_PORT_1, 0), //!< Port 1 Pin 0 enumerator

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