| /hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f4xx/standard_peripheral/source/ |
| D | gd32f4xx_enet.c | 661 uint32_t status; in enet_rxframe_size_get() local
664 status = dma_current_rxdesc->status; in enet_rxframe_size_get()
667 if((uint32_t)RESET != (status & ENET_RDES0_DAV)) { in enet_rxframe_size_get()
672 if((((uint32_t)RESET) != (status & ENET_RDES0_ERRS)) || in enet_rxframe_size_get()
673 (((uint32_t)RESET) == (status & ENET_RDES0_LDES)) || in enet_rxframe_size_get()
674 (((uint32_t)RESET) == (status & ENET_RDES0_FDES))) { in enet_rxframe_size_get()
682 if(((uint32_t)RESET) != (dma_current_rxdesc->status & ENET_RDES0_FRMT) && in enet_rxframe_size_get()
691 if((((uint32_t)RESET) != (status & ENET_RDES0_FRMT)) && in enet_rxframe_size_get()
692 (((uint32_t)RESET) != (status & ENET_RDES0_PCERR))) { in enet_rxframe_size_get()
700 if((((uint32_t)RESET) == (status & ENET_RDES0_DAV)) && in enet_rxframe_size_get()
[all …]
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| D | gd32f4xx_exmc.c | 1114 uint32_t status = 0x00000000U; in exmc_flag_get() local
1118 status = EXMC_NPINTEN(exmc_bank); in exmc_flag_get()
1121 status = EXMC_SDSTAT; in exmc_flag_get()
1124 if((status & flag) != (uint32_t)flag) { in exmc_flag_get()
1184 uint32_t status = 0x00000000U, interrupt_enable = 0x00000000U, interrupt_state = 0x00000000U; in exmc_interrupt_flag_get() local
1188 status = EXMC_NPINTEN(exmc_bank); in exmc_interrupt_flag_get()
1189 interrupt_state = (status & (interrupt >> INTEN_INTS_OFFSET)); in exmc_interrupt_flag_get()
1192 status = EXMC_SDARI; in exmc_interrupt_flag_get()
1196 interrupt_enable = (status & interrupt); in exmc_interrupt_flag_get()
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| /hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e50x/standard_peripheral/source/ |
| D | gd32e50x_enet.c | 659 uint32_t status; in enet_rxframe_size_get() local
662 status = dma_current_rxdesc->status; in enet_rxframe_size_get()
665 if((uint32_t)RESET != (status & ENET_RDES0_DAV)){ in enet_rxframe_size_get()
670 if((((uint32_t)RESET) != (status & ENET_RDES0_ERRS)) || in enet_rxframe_size_get()
671 (((uint32_t)RESET) == (status & ENET_RDES0_LDES)) || in enet_rxframe_size_get()
672 (((uint32_t)RESET) == (status & ENET_RDES0_FDES))){ in enet_rxframe_size_get()
680 if(((uint32_t)RESET) != (dma_current_rxdesc->status & ENET_RDES0_FRMT) && in enet_rxframe_size_get()
689 if((((uint32_t)RESET) != (status & ENET_RDES0_FRMT)) && in enet_rxframe_size_get()
690 (((uint32_t)RESET) != (status & ENET_RDES0_PCERR))){ in enet_rxframe_size_get()
698 if((((uint32_t)RESET) == (status & ENET_RDES0_DAV)) && in enet_rxframe_size_get()
[all …]
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| D | gd32e50x_exmc.c | 621 uint32_t status = 0x00000000U; in exmc_flag_get() local
624 status = EXMC_NPINTEN(exmc_bank); in exmc_flag_get()
626 if ((status & flag) != (uint32_t)flag ){ in exmc_flag_get()
674 uint32_t status = 0x00000000U,interrupt_enable = 0x00000000U,interrupt_state = 0x00000000U; in exmc_interrupt_flag_get() local
677 status = EXMC_NPINTEN(exmc_bank); in exmc_interrupt_flag_get()
678 interrupt_state = (status & (interrupt >> INTEN_INTS_OFFSET)); in exmc_interrupt_flag_get()
680 interrupt_enable = (status & interrupt); in exmc_interrupt_flag_get()
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| D | gd32e50x_fmc.c | 740 FlagStatus status = RESET; in fmc_flag_get() local
743 status = SET; in fmc_flag_get()
746 return status; in fmc_flag_get()
807 FlagStatus status = RESET; in fmc_interrupt_flag_get() local
810 status = SET; in fmc_interrupt_flag_get()
813 return status; in fmc_interrupt_flag_get()
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| /hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32vf103/standard_peripheral/source/ |
| D | gd32vf103_fmc.c | 539 FlagStatus status = RESET; in fmc_flag_get() local
542 status = SET; in fmc_flag_get()
545 return status; in fmc_flag_get()
576 FlagStatus status = RESET; in fmc_interrupt_flag_get() local
579 status = SET; in fmc_interrupt_flag_get()
582 return status; in fmc_interrupt_flag_get()
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| /hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f403/standard_peripheral/source/ |
| D | gd32f403_exmc.c | 587 uint32_t status = 0x00000000U; in exmc_flag_get() local
590 status = EXMC_NPINTEN(exmc_bank); in exmc_flag_get()
592 if ((status & flag) != (uint32_t)flag ){ in exmc_flag_get()
640 uint32_t status = 0x00000000U,interrupt_enable = 0x00000000U,interrupt_state = 0x00000000U; in exmc_interrupt_flag_get() local
643 status = EXMC_NPINTEN(exmc_bank); in exmc_interrupt_flag_get()
644 interrupt_state = (status & (interrupt >> INTEN_INTS_OFFSET)); in exmc_interrupt_flag_get()
646 interrupt_enable = (status & interrupt); in exmc_interrupt_flag_get()
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| /hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32l23x/standard_peripheral/source/ |
| D | gd32l23x_fmc.c | 742 FlagStatus status = RESET; in fmc_flag_get() local
745 status = SET; in fmc_flag_get()
748 return status; in fmc_flag_get()
810 FlagStatus status = RESET; in fmc_interrupt_flag_get() local
813 status = SET; in fmc_interrupt_flag_get()
816 return status; in fmc_interrupt_flag_get()
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| /hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f3x0/standard_peripheral/source/ |
| D | gd32f3x0_fmc.c | 714 FlagStatus status = RESET; in fmc_flag_get() local
717 status = SET; in fmc_flag_get()
720 return status; in fmc_flag_get()
751 FlagStatus status = RESET; in fmc_interrupt_flag_get() local
754 status = SET; in fmc_interrupt_flag_get()
757 return status; in fmc_interrupt_flag_get()
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| /hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e10x/standard_peripheral/source/ |
| D | gd32e10x_fmc.c | 744 FlagStatus status = RESET; in fmc_flag_get() local
747 status = SET; in fmc_flag_get()
750 return status; in fmc_flag_get()
811 FlagStatus status = RESET; in fmc_interrupt_flag_get() local
814 status = SET; in fmc_interrupt_flag_get()
817 return status; in fmc_interrupt_flag_get()
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| /hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e50x/standard_peripheral/include/ |
| D | gd32e50x_enet.h | 970 uint32_t status; /*!< status */ member
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| /hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f4xx/standard_peripheral/include/ |
| D | gd32f4xx_enet.h | 994 uint32_t status; /*!< status */ member
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