DMA_CHXCTL_FTFIE (reference) in projects: hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0

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Searched refs:DMA_CHXCTL_FTFIE (Results 1 – 16 of 16) sorted by relevance

/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f3x0/standard_peripheral/include/
D	gd32f3x0_dma.h	`92 #define DMA_CHXCTL_FTFIE BIT(1) /!< enable bit for channel x trans… macro 177 #define DMA_INT_FTF DMA_CHXCTL_FTFIE /!< enab…`
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f403/standard_peripheral/include/
D	gd32f403_dma.h	`100 #define DMA_CHXCTL_FTFIE BIT(1) /!< enable bit for channel full tr… macro 179 #define DMA_INT_FTF DMA_CHXCTL_FTFIE /!< en…`
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32vf103/standard_peripheral/include/
D	gd32vf103_dma.h	`100 #define DMA_CHXCTL_FTFIE BIT(1) /!< enable bit for channel full tr… macro 180 #define DMA_INT_FTF DMA_CHXCTL_FTFIE /!< en…`
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e10x/standard_peripheral/include/
D	gd32e10x_dma.h	`94 #define DMA_CHXCTL_FTFIE BIT(1) /!< enable bit for channel full tr… macro 173 #define DMA_INT_FTF DMA_CHXCTL_FTFIE /!< en…`
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e50x/standard_peripheral/include/
D	gd32e50x_dma.h	`100 #define DMA_CHXCTL_FTFIE BIT(1) /!< enable bit for channel full tr… macro 180 #define DMA_INT_FTF DMA_CHXCTL_FTFIE /!< en…`
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f4xx/standard_peripheral/source/
D	gd32f4xx_dma.c	`840 interrupt_enable = (DMA_CHCTL(dma_periph, channelx) & DMA_CHXCTL_FTFIE); in dma_interrupt_flag_get() 866 interrupt_enable = DMA_CHCTL(dma_periph, channelx) & DMA_CHXCTL_FTFIE; in dma_interrupt_flag_get()`
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f3x0/standard_peripheral/source/
D	gd32f3x0_dma.c	`488 interrupt_enable = DMA_CHCTL(channelx) & DMA_CHXCTL_FTFIE; in dma_interrupt_flag_get()`
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32l23x/standard_peripheral/include/
D	gd32l23x_dma.h	`107 #define DMA_CHXCTL_FTFIE BIT(1) … macro 353 #define DMA_INT_FTF DMA_CHXCTL_FTFIE …`
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32a50x/standard_peripheral/include/
D	gd32a50x_dma.h	`117 #define DMA_CHXCTL_FTFIE BIT(1) /!< enable bit for … macro 404 #define DMA_INT_FTF DMA_CHXCTL_FTFIE /!< ena…`
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e50x/standard_peripheral/source/
D	gd32e50x_dma.c	`686 interrupt_enable = DMA_CHCTL(dma_periph, channelx) & DMA_CHXCTL_FTFIE; in dma_interrupt_flag_get()`
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f403/standard_peripheral/source/
D	gd32f403_dma.c	`623 interrupt_enable = DMA_CHCTL(dma_periph, channelx) & DMA_CHXCTL_FTFIE; in dma_interrupt_flag_get()`
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e10x/standard_peripheral/source/
D	gd32e10x_dma.c	`625 interrupt_enable = DMA_CHCTL(dma_periph, channelx) & DMA_CHXCTL_FTFIE; in dma_interrupt_flag_get()`
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32vf103/standard_peripheral/source/
D	gd32vf103_dma.c	`618 interrupt_enable = DMA_CHCTL(dma_periph, (uint32_t)channelx) & DMA_CHXCTL_FTFIE; in dma_interrupt_flag_get()`
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32l23x/standard_peripheral/source/
D	gd32l23x_dma.c	`513 interrupt_enable = DMA_CHCTL(channelx) & DMA_CHXCTL_FTFIE; in dma_interrupt_flag_get()`
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32f4xx/standard_peripheral/include/
D	gd32f4xx_dma.h	`128 #define DMA_CHXCTL_FTFIE BIT(4) /*!< enable bit for channel… macro`
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32a50x/standard_peripheral/source/
D	gd32a50x_dma.c	`588 interrupt_enable = DMA_CHCTL(dma_periph, channelx) & DMA_CHXCTL_FTFIE; in dma_interrupt_flag_get()`

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TraceRecorderSource-3.4.0
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