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Searched refs:sdm0 (Results 1 – 9 of 9) sorted by relevance

/hal_espressif-latest/components/esp_hw_support/
Dclk_ctrl_os.c98 uint32_t sdm0 = 0; in periph_rtc_apll_freq_set() local
103 uint32_t apll_freq = rtc_clk_apll_coeff_calc(expt_freq, &o_div, &sdm0, &sdm1, &sdm2); in periph_rtc_apll_freq_set()
121 apll_freq, sdm0, sdm1, sdm2, o_div); in periph_rtc_apll_freq_set()
123 rtc_clk_apll_coeff_set(o_div, sdm0, sdm1, sdm2); in periph_rtc_apll_freq_set()
/hal_espressif-latest/components/hal/esp32/
Dclk_tree_hal.c101 uint32_t sdm0 = 0; in clk_hal_apll_get_freq_hz() local
104 clk_ll_apll_get_config(&o_div, &sdm0, &sdm1, &sdm2); in clk_hal_apll_get_freq_hz()
105 …freq_hz = (uint32_t)(xtal_freq_mhz * MHZ * (4 + sdm2 + (float)sdm1/256.0f + (float)sdm0/65536.0f) / in clk_hal_apll_get_freq_hz()
/hal_espressif-latest/components/hal/esp32s2/
Dclk_tree_hal.c105 uint32_t sdm0 = 0; in clk_hal_apll_get_freq_hz() local
108 clk_ll_apll_get_config(&o_div, &sdm0, &sdm1, &sdm2); in clk_hal_apll_get_freq_hz()
109 …freq_hz = (uint32_t)(xtal_freq_mhz * MHZ * (4 + sdm2 + (float)sdm1/256.0f + (float)sdm0/65536.0f) / in clk_hal_apll_get_freq_hz()
/hal_espressif-latest/components/esp_hw_support/port/esp32s2/
Drtc_clk.c115 int sdm0 = 0; // range: 0~255 in rtc_clk_apll_coeff_calc() local
151 sdm0 = (int)(numrator * 65536.0f + 0.5f) % 256; in rtc_clk_apll_coeff_calc()
153 … (uint32_t)(rtc_xtal_freq * MHZ * (4 + sdm2 + (float)sdm1/256.0f + (float)sdm0/65536.0f) / (((floa… in rtc_clk_apll_coeff_calc()
155 *_sdm0 = sdm0; in rtc_clk_apll_coeff_calc()
161 void rtc_clk_apll_coeff_set(uint32_t o_div, uint32_t sdm0, uint32_t sdm1, uint32_t sdm2) in rtc_clk_apll_coeff_set() argument
163 clk_ll_apll_set_config(o_div, sdm0, sdm1, sdm2); in rtc_clk_apll_coeff_set()
/hal_espressif-latest/components/esp_hw_support/port/esp32/
Drtc_clk.c213 int sdm0 = 0; // range: 0~255 in rtc_clk_apll_coeff_calc() local
249 sdm0 = (int)(numrator * 65536.0f + 0.5f) % 256; in rtc_clk_apll_coeff_calc()
251 … (uint32_t)(xtal_freq_mhz * MHZ * (4 + sdm2 + (float)sdm1/256.0f + (float)sdm0/65536.0f) / (((floa… in rtc_clk_apll_coeff_calc()
253 *_sdm0 = sdm0; in rtc_clk_apll_coeff_calc()
259 void rtc_clk_apll_coeff_set(uint32_t o_div, uint32_t sdm0, uint32_t sdm1, uint32_t sdm2) in rtc_clk_apll_coeff_set() argument
262 clk_ll_apll_set_config(is_rev0, o_div, sdm0, sdm1, sdm2); in rtc_clk_apll_coeff_set()
/hal_espressif-latest/components/hal/esp32/include/hal/
Dclk_tree_ll.h164 …_((always_inline)) void clk_ll_apll_get_config(uint32_t *o_div, uint32_t *sdm0, uint32_t *sdm1, ui… in clk_ll_apll_get_config() argument
167 *sdm0 = REGI2C_READ_MASK(I2C_APLL, I2C_APLL_DSDM0); in clk_ll_apll_get_config()
181 …line)) void clk_ll_apll_set_config(bool is_rev0, uint32_t o_div, uint32_t sdm0, uint32_t sdm1, uin… in clk_ll_apll_set_config() argument
185 sdm0 = 0; in clk_ll_apll_set_config()
190 REGI2C_WRITE_MASK(I2C_APLL, I2C_APLL_DSDM0, sdm0); in clk_ll_apll_set_config()
/hal_espressif-latest/components/hal/esp32s2/include/hal/
Dclk_tree_ll.h121 …_((always_inline)) void clk_ll_apll_get_config(uint32_t *o_div, uint32_t *sdm0, uint32_t *sdm1, ui… in clk_ll_apll_get_config() argument
124 *sdm0 = REGI2C_READ_MASK(I2C_APLL, I2C_APLL_DSDM0); in clk_ll_apll_get_config()
137 …e__((always_inline)) void clk_ll_apll_set_config(uint32_t o_div, uint32_t sdm0, uint32_t sdm1, uin… in clk_ll_apll_set_config() argument
140 REGI2C_WRITE_MASK(I2C_APLL, I2C_APLL_DSDM0, sdm0); in clk_ll_apll_set_config()
/hal_espressif-latest/components/soc/esp32/include/soc/
Drtc.h266 void rtc_clk_apll_coeff_set(uint32_t o_div, uint32_t sdm0, uint32_t sdm1, uint32_t sdm2);
/hal_espressif-latest/components/soc/esp32s2/include/soc/
Drtc.h352 void rtc_clk_apll_coeff_set(uint32_t o_div, uint32_t sdm0, uint32_t sdm1, uint32_t sdm2);