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Searched refs:dr1 (Results 1 – 5 of 5) sorted by relevance

/hal_espressif-latest/components/hal/esp32s3/include/hal/
Dclk_tree_ll.h309 uint8_t dr1; in clk_ll_bbpll_set_config() local
321 dr1 = 0; in clk_ll_bbpll_set_config()
329 dr1 = 1; in clk_ll_bbpll_set_config()
337 dr1 = 0; in clk_ll_bbpll_set_config()
350 dr1 = 0; in clk_ll_bbpll_set_config()
358 dr1 = 0; in clk_ll_bbpll_set_config()
366 dr1 = 0; in clk_ll_bbpll_set_config()
379 REGI2C_WRITE_MASK(I2C_BBPLL, I2C_BBPLL_OC_DR1, dr1); in clk_ll_bbpll_set_config()
701 uint8_t dr1 = 0; in clk_ll_bbpll_set_frequency_for_mspi_tuning() local
713 REGI2C_WRITE_MASK(I2C_BBPLL, I2C_BBPLL_OC_DR1, dr1); in clk_ll_bbpll_set_frequency_for_mspi_tuning()
/hal_espressif-latest/components/hal/esp32c3/include/hal/
Dclk_tree_ll.h307 uint8_t dr1; in clk_ll_bbpll_set_config() local
319 dr1 = 0; in clk_ll_bbpll_set_config()
328 dr1 = 1; in clk_ll_bbpll_set_config()
337 dr1 = 0; in clk_ll_bbpll_set_config()
351 dr1 = 0; in clk_ll_bbpll_set_config()
360 dr1 = 0; in clk_ll_bbpll_set_config()
369 dr1 = 0; in clk_ll_bbpll_set_config()
383 REGI2C_WRITE_MASK(I2C_BBPLL, I2C_BBPLL_OC_DR1, dr1); in clk_ll_bbpll_set_config()
/hal_espressif-latest/components/hal/esp32c2/include/hal/
Dclk_tree_ll.h234 uint8_t dr1; in clk_ll_bbpll_set_config() local
245 dr1 = 4; in clk_ll_bbpll_set_config()
254 dr1 = 0; in clk_ll_bbpll_set_config()
264 dr1 = 0; in clk_ll_bbpll_set_config()
277 REGI2C_WRITE_MASK(I2C_BBPLL, I2C_BBPLL_OC_DR1, dr1); in clk_ll_bbpll_set_config()
/hal_espressif-latest/components/hal/esp32s2/include/hal/
Dclk_tree_ll.h394 uint8_t dr1; in clk_ll_bbpll_set_config() local
403 dr1 = 0; in clk_ll_bbpll_set_config()
412 dr1 = 0; in clk_ll_bbpll_set_config()
423 REGI2C_WRITE_MASK(I2C_BBPLL, I2C_BBPLL_OC_DR1, dr1); in clk_ll_bbpll_set_config()
/hal_espressif-latest/components/hal/esp32c6/include/hal/
Dclk_tree_ll.h305 uint8_t dr1; in clk_ll_bbpll_set_config() local
317 dr1 = 0; in clk_ll_bbpll_set_config()
329 REGI2C_WRITE_MASK(I2C_BBPLL, I2C_BBPLL_OC_DR1, dr1); in clk_ll_bbpll_set_config()