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Searched refs:TIMG1_INT_CLR_OFFSET (Results 1 – 1 of 1) sorted by relevance

/hal_espressif-latest/components/esp_system/port/soc/esp32/
Dhighint_hdl.S68 #define TIMG1_INT_CLR_OFFSET TIMG1_REG_OFFSET(TIMG_INT_CLR_TIMERS_REG(1)) macro
79 l32i a4, a2, TIMG1_INT_CLR_OFFSET
83 s32i a3, a2, TIMG1_INT_CLR_OFFSET /* clear 1st stage timeout interrupt */