Home
last modified time | relevance | path

Searched refs:SYSTEM_SYSCLK_CONF_REG (Results 1 – 9 of 9) sorted by relevance

/hal_espressif-latest/components/hal/esp32c2/include/hal/
Dclk_tree_ll.h292 REG_SET_FIELD(SYSTEM_SYSCLK_CONF_REG, SYSTEM_SOC_CLK_SEL, 0); in clk_ll_cpu_set_src()
295 REG_SET_FIELD(SYSTEM_SYSCLK_CONF_REG, SYSTEM_SOC_CLK_SEL, 1); in clk_ll_cpu_set_src()
298 REG_SET_FIELD(SYSTEM_SYSCLK_CONF_REG, SYSTEM_SOC_CLK_SEL, 2); in clk_ll_cpu_set_src()
313 uint32_t clk_sel = REG_GET_FIELD(SYSTEM_SYSCLK_CONF_REG, SYSTEM_SOC_CLK_SEL); in clk_ll_cpu_get_src()
374 REG_SET_FIELD(SYSTEM_SYSCLK_CONF_REG, SYSTEM_PRE_DIV_CNT, divider - 1); in clk_ll_cpu_set_divider()
384 return REG_GET_FIELD(SYSTEM_SYSCLK_CONF_REG, SYSTEM_PRE_DIV_CNT) + 1; in clk_ll_cpu_get_divider()
/hal_espressif-latest/components/hal/esp32s3/include/hal/
Dclk_tree_ll.h394 REG_SET_FIELD(SYSTEM_SYSCLK_CONF_REG, SYSTEM_SOC_CLK_SEL, 0); in clk_ll_cpu_set_src()
397 REG_SET_FIELD(SYSTEM_SYSCLK_CONF_REG, SYSTEM_SOC_CLK_SEL, 1); in clk_ll_cpu_set_src()
400 REG_SET_FIELD(SYSTEM_SYSCLK_CONF_REG, SYSTEM_SOC_CLK_SEL, 2); in clk_ll_cpu_set_src()
415 uint32_t clk_sel = REG_GET_FIELD(SYSTEM_SYSCLK_CONF_REG, SYSTEM_SOC_CLK_SEL); in clk_ll_cpu_get_src()
483 REG_SET_FIELD(SYSTEM_SYSCLK_CONF_REG, SYSTEM_PRE_DIV_CNT, divider - 1); in clk_ll_cpu_set_divider()
493 return REG_GET_FIELD(SYSTEM_SYSCLK_CONF_REG, SYSTEM_PRE_DIV_CNT) + 1; in clk_ll_cpu_get_divider()
/hal_espressif-latest/components/hal/esp32c3/include/hal/
Dclk_tree_ll.h400 REG_SET_FIELD(SYSTEM_SYSCLK_CONF_REG, SYSTEM_SOC_CLK_SEL, 0); in clk_ll_cpu_set_src()
403 REG_SET_FIELD(SYSTEM_SYSCLK_CONF_REG, SYSTEM_SOC_CLK_SEL, 1); in clk_ll_cpu_set_src()
406 REG_SET_FIELD(SYSTEM_SYSCLK_CONF_REG, SYSTEM_SOC_CLK_SEL, 2); in clk_ll_cpu_set_src()
421 uint32_t clk_sel = REG_GET_FIELD(SYSTEM_SYSCLK_CONF_REG, SYSTEM_SOC_CLK_SEL); in clk_ll_cpu_get_src()
482 REG_SET_FIELD(SYSTEM_SYSCLK_CONF_REG, SYSTEM_PRE_DIV_CNT, divider - 1); in clk_ll_cpu_set_divider()
492 return REG_GET_FIELD(SYSTEM_SYSCLK_CONF_REG, SYSTEM_PRE_DIV_CNT) + 1; in clk_ll_cpu_get_divider()
/hal_espressif-latest/tools/esptool_py/flasher_stub/
Dstub_flasher.c83 sysclk_conf_reg = READ_REG(SYSTEM_SYSCLK_CONF_REG); in set_max_cpu_freq()
84 …WRITE_REG(SYSTEM_SYSCLK_CONF_REG, (sysclk_conf_reg & ~SYSTEM_SOC_CLK_SEL_M) | (SYSTEM_SOC_CLK_MAX … in set_max_cpu_freq()
104 …WRITE_REG(SYSTEM_SYSCLK_CONF_REG, (READ_REG(SYSTEM_SYSCLK_CONF_REG) & ~SYSTEM_SOC_CLK_SEL_M) | (sy… in reset_cpu_freq()
/hal_espressif-latest/tools/esptool_py/flasher_stub/include/
Dsoc_support.h438 #define SYSTEM_SYSCLK_CONF_REG (SYSTEM_BASE_REG + 0x058) macro
452 #define SYSTEM_SYSCLK_CONF_REG (SYSTEM_BASE_REG + 0x08C) macro
/hal_espressif-latest/components/soc/esp32c2/include/soc/
Dsystem_reg.h632 #define SYSTEM_SYSCLK_CONF_REG (DR_REG_SYSTEM_BASE + 0x58) macro
/hal_espressif-latest/components/soc/esp32c3/include/soc/
Dsystem_reg.h822 #define SYSTEM_SYSCLK_CONF_REG (DR_REG_SYSTEM_BASE + 0x058) macro
/hal_espressif-latest/components/soc/esp32s3/include/soc/
Dsystem_reg.h863 #define SYSTEM_SYSCLK_CONF_REG (DR_REG_SYSTEM_BASE + 0x60) macro
/hal_espressif-latest/tools/esptool_py/test/
Dtest_esptool.py688 SYSTEM_SYSCLK_CONF_REG = SYSTEM_BASE_REG + 0x058
702 SYSTEM_SYSCLK_CONF_REG,