Searched refs:SOC_MOD_CLK_PLL_D2 (Results 1 – 4 of 4) sorted by relevance
| /hal_espressif-latest/components/soc/esp32s3/include/soc/ |
| D | clk_tree_defs.h | 120 …SOC_MOD_CLK_PLL_D2, /*!< PLL_D2_CLK is derived from PLL, it has a fixed div… enumerator
178 #define SOC_LCD_CLKS {SOC_MOD_CLK_PLL_F160M, SOC_MOD_CLK_PLL_D2, SOC_MOD_CLK_XTAL}
185 LCD_CLK_SRC_PLL240M = SOC_MOD_CLK_PLL_D2, /*!< Select PLL_D2 as the source clock */
389 #define SOC_ADC_DIGI_CLKS {SOC_MOD_CLK_APB, SOC_MOD_CLK_PLL_D2}
396 …ADC_DIGI_CLK_SRC_PLL_F240M = SOC_MOD_CLK_PLL_D2, /*!< Select PLL_D2 (default value PLL_F240M) a…
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| /hal_espressif-latest/components/soc/esp32/include/soc/ |
| D | clk_tree_defs.h | 110 …SOC_MOD_CLK_PLL_D2, /*!< PLL_D2_CLK is derived from PLL, it has a fixed div… enumerator
321 #define SOC_DAC_DIGI_CLKS {SOC_MOD_CLK_PLL_D2, SOC_MOD_CLK_APLL}
328 DAC_DIGI_CLK_SRC_PLLD2 = SOC_MOD_CLK_PLL_D2, /*!< Select PLL_D2 as the source clock */
330 … DAC_DIGI_CLK_SRC_DEFAULT = SOC_MOD_CLK_PLL_D2, /*!< Select PLL_D2 as the default source clock */
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| /hal_espressif-latest/components/esp_hw_support/port/esp32s3/ |
| D | esp_clk_tree.c | 42 case SOC_MOD_CLK_PLL_D2: in esp_clk_tree_src_get_freq_hz()
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| /hal_espressif-latest/components/esp_hw_support/port/esp32/ |
| D | esp_clk_tree.c | 36 case SOC_MOD_CLK_PLL_D2: in esp_clk_tree_src_get_freq_hz()
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