Searched refs:DR_REG_ECC_MULT_BASE (Results 1 – 6 of 6) sorted by relevance
14 #define ECC_MULT_INT_RAW_REG (DR_REG_ECC_MULT_BASE + 0xC)22 #define ECC_MULT_INT_ST_REG (DR_REG_ECC_MULT_BASE + 0x10)30 #define ECC_MULT_INT_ENA_REG (DR_REG_ECC_MULT_BASE + 0x14)38 #define ECC_MULT_INT_CLR_REG (DR_REG_ECC_MULT_BASE + 0x18)46 #define ECC_MULT_CONF_REG (DR_REG_ECC_MULT_BASE + 0x1C)90 #define ECC_MULT_DATE_REG (DR_REG_ECC_MULT_BASE + 0xFC)98 #define ECC_MULT_K_1_REG (DR_REG_ECC_MULT_BASE + 0x0100)106 #define ECC_MULT_K_2_REG (DR_REG_ECC_MULT_BASE + 0x0104)114 #define ECC_MULT_K_3_REG (DR_REG_ECC_MULT_BASE + 0x0108)122 #define ECC_MULT_K_4_REG (DR_REG_ECC_MULT_BASE + 0x010c)[all …]
12 #define DR_REG_ECC_MULT_BASE 0x6003e000 macro
17 #define ECC_MULT_INT_RAW_REG (DR_REG_ECC_MULT_BASE + 0xc)29 #define ECC_MULT_INT_ST_REG (DR_REG_ECC_MULT_BASE + 0x10)41 #define ECC_MULT_INT_ENA_REG (DR_REG_ECC_MULT_BASE + 0x14)53 #define ECC_MULT_INT_CLR_REG (DR_REG_ECC_MULT_BASE + 0x18)65 #define ECC_MULT_CONF_REG (DR_REG_ECC_MULT_BASE + 0x1c)138 #define ECC_MULT_DATE_REG (DR_REG_ECC_MULT_BASE + 0xfc)150 #define ECC_MULT_K_MEM (DR_REG_ECC_MULT_BASE + 0x100)156 #define ECC_MULT_PX_MEM (DR_REG_ECC_MULT_BASE + 0x120)162 #define ECC_MULT_PY_MEM (DR_REG_ECC_MULT_BASE + 0x140)168 #define ECC_MULT_QX_MEM (DR_REG_ECC_MULT_BASE + 0x160)[all …]
34 #define DR_REG_ECC_MULT_BASE 0x6008B000 macro
17 #define ECC_MULT_INT_RAW_REG (DR_REG_ECC_MULT_BASE + 0xc)29 #define ECC_MULT_INT_ST_REG (DR_REG_ECC_MULT_BASE + 0x10)41 #define ECC_MULT_INT_ENA_REG (DR_REG_ECC_MULT_BASE + 0x14)53 #define ECC_MULT_INT_CLR_REG (DR_REG_ECC_MULT_BASE + 0x18)65 #define ECC_MULT_CONF_REG (DR_REG_ECC_MULT_BASE + 0x1c)129 #define ECC_MULT_DATE_REG (DR_REG_ECC_MULT_BASE + 0xfc)141 #define ECC_MULT_K_MEM (DR_REG_ECC_MULT_BASE + 0x100)147 #define ECC_MULT_PX_MEM (DR_REG_ECC_MULT_BASE + 0x120)153 #define ECC_MULT_PY_MEM (DR_REG_ECC_MULT_BASE + 0x140)
43 #define DR_REG_ECC_MULT_BASE 0x6008B000 macro
