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Searched refs:pipe (Results 1 – 4 of 4) sorted by relevance

/hal_espressif-3.6.0/components/usb/
Dhcd.c340 static inline bool _buffer_can_fill(pipe_t *pipe) in _buffer_can_fill() argument
343 if (pipe->num_urb_pending > 0 && pipe->multi_buffer_control.buffer_num_to_fill > 0) { in _buffer_can_fill()
361 static void _buffer_fill(pipe_t *pipe);
370 static inline bool _buffer_can_exec(pipe_t *pipe) in _buffer_can_exec() argument
373 …if (!pipe->multi_buffer_control.buffer_is_executing && pipe->multi_buffer_control.buffer_num_to_ex… in _buffer_can_exec()
388 static void _buffer_exec(pipe_t *pipe);
400 static inline bool _buffer_check_done(pipe_t *pipe) in _buffer_check_done() argument
402 if (pipe->ep_char.type != USB_PRIV_XFER_TYPE_CTRL) { in _buffer_check_done()
406 dma_buffer_block_t *buffer_inflight = pipe->buffers[pipe->multi_buffer_control.rd_idx]; in _buffer_check_done()
417 static void _buffer_exec_cont(pipe_t *pipe);
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Dhub.c153 hcd_pipe_handle_t pipe; /**< Default pipe handle of the device being enumerated */ member
277 enum_ctrl->pipe = enum_dflt_pipe_hdl; in enum_stage_start()
283 …ESP_ERROR_CHECK(hcd_pipe_set_persist_reset(enum_ctrl->pipe)); //Persist the default pipe through … in enum_stage_second_reset()
402 if (hcd_urb_enqueue(enum_ctrl->pipe, enum_ctrl->urb) != ESP_OK) { in enum_stage_transfer()
412 urb_t *dequeued_enum_urb = hcd_urb_dequeue(enum_ctrl->pipe); in enum_stage_transfer_check()
439 if (hcd_pipe_update_mps(enum_ctrl->pipe, device_desc->bMaxPacketSize0) != ESP_OK) { in enum_stage_transfer_check()
451 ESP_ERROR_CHECK(hcd_pipe_update_dev_addr(enum_ctrl->pipe, ENUM_DEV_ADDR)); in enum_stage_transfer_check()
590 enum_ctrl->pipe = NULL; in enum_stage_cleanup()
601 ESP_ERROR_CHECK(hcd_pipe_command(enum_ctrl->pipe, HCD_PIPE_CMD_HALT)); in enum_stage_cleanup_failed()
602 ESP_ERROR_CHECK(hcd_pipe_command(enum_ctrl->pipe, HCD_PIPE_CMD_FLUSH)); in enum_stage_cleanup_failed()
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Dmaintainers.md78 …represent a USB transfer that can be enqueued into a pipe for transmission, and dequeued from a pi…
103 …dpoint based on a descriptor provided on allocation. If opening a default pipe, a `NULL` descripto…
104 - URBs can be enqueued into a pipe. Pipes use a linked list internally, so there is (in theory) no …
115 …ata structure they want to use in the callbacks to keep track of port and pipe events. Callbacks d…
116 - The port and each pipe have to be treated as completely separate entities (with their own handles…
119 …ad (e.g., a single while loop polling a port and all its pipes vs or each pipe having its own task…
120 - The HCD uses an interrupt to process things that require low latency such as processing pipe tran…
129 - A pipe callback on each pipe, that will run when a event occurs on a pipe.
131 The client of the HCD can also forego callbacks entirely and simply poll for port and pipe events u…
133 - Some of the port and pipe commands may need to block for a certain condition before the command i…
/hal_espressif-3.6.0/components/xtensa/trax/test/
Dgdbinit6 …E 0; set ESP32_ONLYCPU 1" -f board/esp32-ethernet-kit-3.3v.cfg -c "gdb_port pipe; init; reset halt"