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Searched refs:SYSTEM_PERIP_CLK_EN1_REG (Results 1 – 11 of 11) sorted by relevance

/hal_espressif-3.6.0/components/esp_system/port/soc/esp32h2/
Dclk.c212 hwcrypto_perip_clk = ~READ_PERI_REG(SYSTEM_PERIP_CLK_EN1_REG); in esp_perip_clk_init()
273 CLEAR_PERI_REG_MASK(SYSTEM_PERIP_CLK_EN1_REG, common_perip_clk1); in esp_perip_clk_init()
277 CLEAR_PERI_REG_MASK(SYSTEM_PERIP_CLK_EN1_REG, hwcrypto_perip_clk); in esp_perip_clk_init()
/hal_espressif-3.6.0/components/esp_system/port/soc/esp32c3/
Dclk.c220 hwcrypto_perip_clk = ~READ_PERI_REG(SYSTEM_PERIP_CLK_EN1_REG); in esp_perip_clk_init()
286 CLEAR_PERI_REG_MASK(SYSTEM_PERIP_CLK_EN1_REG, common_perip_clk1); in esp_perip_clk_init()
290 CLEAR_PERI_REG_MASK(SYSTEM_PERIP_CLK_EN1_REG, hwcrypto_perip_clk); in esp_perip_clk_init()
/hal_espressif-3.6.0/components/esp_system/port/soc/esp32s3/
Dclk.c237 hwcrypto_perip_clk = ~READ_PERI_REG(SYSTEM_PERIP_CLK_EN1_REG); in esp_perip_clk_init()
309 CLEAR_PERI_REG_MASK(SYSTEM_PERIP_CLK_EN1_REG, common_perip_clk1); in esp_perip_clk_init()
313 CLEAR_PERI_REG_MASK(SYSTEM_PERIP_CLK_EN1_REG, hwcrypto_perip_clk); in esp_perip_clk_init()
/hal_espressif-3.6.0/components/driver/esp32c3/
Drtc_tempsensor.c68 REG_SET_BIT(SYSTEM_PERIP_CLK_EN1_REG, SYSTEM_TSENS_CLK_EN); in temp_sensor_set_config()
105 REG_SET_BIT(SYSTEM_PERIP_CLK_EN1_REG, SYSTEM_TSENS_CLK_EN); in temp_sensor_start()
/hal_espressif-3.6.0/components/driver/esp32h2/
Drtc_tempsensor.c66 REG_SET_BIT(SYSTEM_PERIP_CLK_EN1_REG, SYSTEM_TSENS_CLK_EN); in temp_sensor_set_config()
103 REG_SET_BIT(SYSTEM_PERIP_CLK_EN1_REG, SYSTEM_TSENS_CLK_EN); in temp_sensor_start()
/hal_espressif-3.6.0/components/hal/esp32h2/include/hal/
Dclk_gate_ll.h154 return SYSTEM_PERIP_CLK_EN1_REG; in periph_ll_get_clk_en_reg()
/hal_espressif-3.6.0/components/hal/esp32c3/include/hal/
Dclk_gate_ll.h174 return SYSTEM_PERIP_CLK_EN1_REG; in periph_ll_get_clk_en_reg()
/hal_espressif-3.6.0/components/hal/esp32s3/include/hal/
Dclk_gate_ll.h216 return SYSTEM_PERIP_CLK_EN1_REG; in periph_ll_get_clk_en_reg()
/hal_espressif-3.6.0/components/soc/esp32c3/include/soc/
Dsystem_reg.h278 #define SYSTEM_PERIP_CLK_EN1_REG (DR_REG_SYSTEM_BASE + 0x014) macro
/hal_espressif-3.6.0/components/soc/esp32h2/include/soc/
Dclkrst_reg.h633 #define SYSTEM_PERIP_CLK_EN1_REG (DR_REG_CLKRST_BASE + 0x0024) macro
/hal_espressif-3.6.0/components/soc/esp32s3/include/soc/
Dsystem_reg.h307 #define SYSTEM_PERIP_CLK_EN1_REG (DR_REG_SYSTEM_BASE + 0x1C) macro