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Searched refs:SENS_SAR_ATTEN1_REG (Results 1 – 4 of 4) sorted by relevance

/hal_espressif-3.6.0/components/ulp/test/esp32/
Dtest_ulp.c426 SET_PERI_REG_BITS(SENS_SAR_ATTEN1_REG, 3, atten, 2 * channel); //set SAR1 attenuation
/hal_espressif-3.6.0/components/soc/esp32/include/soc/
Dsens_reg.h300 #define SENS_SAR_ATTEN1_REG (DR_REG_SENS_BASE + 0x0034) macro
/hal_espressif-3.6.0/components/soc/esp32s2/include/soc/
Dsens_reg.h149 #define SENS_SAR_ATTEN1_REG (DR_REG_SENS_BASE + 0x0014) macro
/hal_espressif-3.6.0/components/soc/esp32s3/include/soc/
Dsens_reg.h135 #define SENS_SAR_ATTEN1_REG (DR_REG_SENS_BASE + 0x14) macro