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Searched refs:REG_I2S_BASE (Results 1 – 9 of 9) sorted by relevance

/hal_espressif-3.6.0/components/soc/esp32/include/soc/
Di2s_reg.h19 #define REG_I2S_BASE( i ) ( DR_REG_I2S_BASE + ((i)*0x1E000)) macro
22 #define I2S_CONF_REG(i) (REG_I2S_BASE(i) + 0x0008)
138 #define I2S_INT_RAW_REG(i) (REG_I2S_BASE(i) + 0x000c)
242 #define I2S_INT_ST_REG(i) (REG_I2S_BASE(i) + 0x0010)
346 #define I2S_INT_ENA_REG(i) (REG_I2S_BASE(i) + 0x0014)
450 #define I2S_INT_CLR_REG(i) (REG_I2S_BASE(i) + 0x0018)
554 #define I2S_TIMING_REG(i) (REG_I2S_BASE(i) + 0x001c)
640 #define I2S_FIFO_CONF_REG(i) (REG_I2S_BASE(i) + 0x0020)
684 #define I2S_RXEOF_NUM_REG(i) (REG_I2S_BASE(i) + 0x0024)
692 #define I2S_CONF_SIGLE_DATA_REG(i) (REG_I2S_BASE(i) + 0x0028)
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/hal_espressif-3.6.0/components/soc/esp32s2/include/soc/
Di2s_reg.h22 #define I2S_CONF_REG(i) (REG_I2S_BASE(i) + 0x0008)
205 #define I2S_INT_RAW_REG(i) (REG_I2S_BASE(i) + 0x000c)
315 #define I2S_INT_ST_REG(i) (REG_I2S_BASE(i) + 0x0010)
425 #define I2S_INT_ENA_REG(i) (REG_I2S_BASE(i) + 0x0014)
535 #define I2S_INT_CLR_REG(i) (REG_I2S_BASE(i) + 0x0018)
645 #define I2S_TIMING_REG(i) (REG_I2S_BASE(i) + 0x001c)
733 #define I2S_FIFO_CONF_REG(i) (REG_I2S_BASE(i) + 0x0020)
797 #define I2S_RXEOF_NUM_REG(i) (REG_I2S_BASE(i) + 0x0024)
805 #define I2S_CONF_SIGLE_DATA_REG(i) (REG_I2S_BASE(i) + 0x0028)
814 #define I2S_CONF_CHAN_REG(i) (REG_I2S_BASE(i) + 0x002c)
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Dsoc.h99 #define REG_I2S_BASE( i ) (DR_REG_I2S_BASE) macro
/hal_espressif-3.6.0/components/soc/esp32c3/include/soc/
Di2s_reg.h22 #define I2S_INT_RAW_REG(i) (REG_I2S_BASE(i) + 0x000c)
48 #define I2S_INT_ST_REG(i) (REG_I2S_BASE(i) + 0x0010)
74 #define I2S_INT_ENA_REG(i) (REG_I2S_BASE(i) + 0x0014)
100 #define I2S_INT_CLR_REG(i) (REG_I2S_BASE(i) + 0x0018)
126 #define I2S_RX_CONF_REG(i) (REG_I2S_BASE(i) + 0x0020)
237 #define I2S_TX_CONF_REG(i) (REG_I2S_BASE(i) + 0x0024)
368 #define I2S_RX_CONF1_REG(i) (REG_I2S_BASE(i) + 0x0028)
406 #define I2S_TX_CONF1_REG(i) (REG_I2S_BASE(i) + 0x002C)
444 #define I2S_RX_CLKM_CONF_REG(i) (REG_I2S_BASE(i) + 0x0030)
472 #define I2S_TX_CLKM_CONF_REG(i) (REG_I2S_BASE(i) + 0x0034)
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Dsoc.h75 #define REG_I2S_BASE(i) (DR_REG_I2S_BASE + (i) * 0x1E000) macro
/hal_espressif-3.6.0/components/soc/esp32h2/include/soc/
Di2s_reg.h22 #define I2S_INT_RAW_REG(i) (REG_I2S_BASE(i) + 0x000c)
48 #define I2S_INT_ST_REG(i) (REG_I2S_BASE(i) + 0x0010)
74 #define I2S_INT_ENA_REG(i) (REG_I2S_BASE(i) + 0x0014)
100 #define I2S_INT_CLR_REG(i) (REG_I2S_BASE(i) + 0x0018)
126 #define I2S_RX_CONF_REG(i) (REG_I2S_BASE(i) + 0x0020)
249 #define I2S_TX_CONF_REG(i) (REG_I2S_BASE(i) + 0x0024)
380 #define I2S_RX_CONF1_REG(i) (REG_I2S_BASE(i) + 0x0028)
418 #define I2S_TX_CONF1_REG(i) (REG_I2S_BASE(i) + 0x002C)
456 #define I2S_RX_CLKM_CONF_REG(i) (REG_I2S_BASE(i) + 0x0030)
484 #define I2S_TX_CLKM_CONF_REG(i) (REG_I2S_BASE(i) + 0x0034)
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Dsoc.h103 #define REG_I2S_BASE( i ) (DR_REG_I2S_BASE + (i) * 0x1E000) macro
/hal_espressif-3.6.0/components/soc/esp32s3/include/soc/
Di2s_reg.h23 #define I2S_INT_RAW_REG(i) (REG_I2S_BASE(i) + 0xC)
49 #define I2S_INT_ST_REG(i) (REG_I2S_BASE(i) + 0x10)
75 #define I2S_INT_ENA_REG(i) (REG_I2S_BASE(i) + 0x14)
101 #define I2S_INT_CLR_REG(i) (REG_I2S_BASE(i) + 0x18)
127 #define I2S_RX_CONF_REG(i) (REG_I2S_BASE(i) + 0x20)
253 #define I2S_TX_CONF_REG(i) (REG_I2S_BASE(i) + 0x24)
385 #define I2S_RX_CONF1_REG(i) (REG_I2S_BASE(i) + 0x28)
426 #define I2S_TX_CONF1_REG(i) (REG_I2S_BASE(i) + 0x2C)
474 #define I2S_RX_CLKM_CONF_REG(i) (REG_I2S_BASE(i) + 0x30)
502 #define I2S_TX_CLKM_CONF_REG(i) (REG_I2S_BASE(i) + 0x34)
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Dsoc.h119 #define REG_I2S_BASE( i ) (DR_REG_I2S_BASE + (i) * 0x1E000) macro