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Searched refs:DR_REG_SDMMC_BASE (Results 1 – 5 of 5) sorted by relevance

/hal_espressif-3.6.0/components/soc/esp32s3/include/soc/
Dsdmmc_reg.h18 #define SDMMC_CTRL_REG (DR_REG_SDMMC_BASE + 0x00)
19 #define SDMMC_PWREN_REG (DR_REG_SDMMC_BASE + 0x04)
20 #define SDMMC_CLKDIV_REG (DR_REG_SDMMC_BASE + 0x08)
21 #define SDMMC_CLKSRC_REG (DR_REG_SDMMC_BASE + 0x0c)
22 #define SDMMC_CLKENA_REG (DR_REG_SDMMC_BASE + 0x10)
23 #define SDMMC_TMOUT_REG (DR_REG_SDMMC_BASE + 0x14)
24 #define SDMMC_CTYPE_REG (DR_REG_SDMMC_BASE + 0x18)
25 #define SDMMC_BLKSIZ_REG (DR_REG_SDMMC_BASE + 0x1c)
26 #define SDMMC_BYTCNT_REG (DR_REG_SDMMC_BASE + 0x20)
27 #define SDMMC_INTMASK_REG (DR_REG_SDMMC_BASE + 0x24)
[all …]
Dsoc.h78 #define DR_REG_SDMMC_BASE 0x60028000 macro
/hal_espressif-3.6.0/components/soc/esp32/include/soc/
Dsdmmc_reg.h18 #define SDMMC_CTRL_REG (DR_REG_SDMMC_BASE + 0x00)
19 #define SDMMC_PWREN_REG (DR_REG_SDMMC_BASE + 0x04)
20 #define SDMMC_CLKDIV_REG (DR_REG_SDMMC_BASE + 0x08)
21 #define SDMMC_CLKSRC_REG (DR_REG_SDMMC_BASE + 0x0c)
22 #define SDMMC_CLKENA_REG (DR_REG_SDMMC_BASE + 0x10)
23 #define SDMMC_TMOUT_REG (DR_REG_SDMMC_BASE + 0x14)
24 #define SDMMC_CTYPE_REG (DR_REG_SDMMC_BASE + 0x18)
25 #define SDMMC_BLKSIZ_REG (DR_REG_SDMMC_BASE + 0x1c)
26 #define SDMMC_BYTCNT_REG (DR_REG_SDMMC_BASE + 0x20)
27 #define SDMMC_INTMASK_REG (DR_REG_SDMMC_BASE + 0x24)
[all …]
Dsoc.h78 #define DR_REG_SDMMC_BASE 0x3ff68000 macro
/hal_espressif-3.6.0/components/soc/esp32h2/include/soc/
Dsoc.h83 #define DR_REG_SDMMC_BASE 0x60028000 macro