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Searched refs:DR_REG_CP_BASE (Results 1 – 2 of 2) sorted by relevance

/hal_espressif-3.6.0/components/soc/esp32s2/include/soc/
Dcp_dma_reg.h26 #define CP_DMA_INT_RAW_REG (DR_REG_CP_BASE + 0x0)
102 #define CP_DMA_INT_ST_REG (DR_REG_CP_BASE + 0x4)
179 #define CP_DMA_INT_ENA_REG (DR_REG_CP_BASE + 0x8)
247 #define CP_DMA_INT_CLR_REG (DR_REG_CP_BASE + 0xc)
315 #define CP_DMA_OUT_LINK_REG (DR_REG_CP_BASE + 0x10)
357 #define CP_DMA_IN_LINK_REG (DR_REG_CP_BASE + 0x14)
399 #define CP_DMA_OUT_EOF_DES_ADDR_REG (DR_REG_CP_BASE + 0x18)
412 #define CP_DMA_IN_EOF_DES_ADDR_REG (DR_REG_CP_BASE + 0x1c)
425 #define CP_DMA_OUT_EOF_BFR_DES_ADDR_REG (DR_REG_CP_BASE + 0x20)
438 #define CP_DMA_INLINK_DSCR_REG (DR_REG_CP_BASE + 0x24)
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Dsoc.h68 #define DR_REG_CP_BASE 0x3f4c3000 macro