Searched refs:DPORT_PMS_PRO_DPORT_1_REG (Results 1 – 2 of 2) sorted by relevance
| /hal_espressif-3.6.0/components/hal/esp32s2/include/hal/ |
| D | memprot_peri_ll.h | 157 DPORT_WRITE_PERI_REG(DPORT_PMS_PRO_DPORT_1_REG, reg_split_addr | permission_mask); in memprot_ll_peri1_rtcslow_set_prot()
164 *lw = DPORT_REG_GET_FIELD(DPORT_PMS_PRO_DPORT_1_REG, DPORT_PMS_PRO_DPORT_RTCSLOW_L_W); in memprot_ll_peri1_rtcslow_get_split_sgnf_bits()
165 *lr = DPORT_REG_GET_FIELD(DPORT_PMS_PRO_DPORT_1_REG, DPORT_PMS_PRO_DPORT_RTCSLOW_L_R); in memprot_ll_peri1_rtcslow_get_split_sgnf_bits()
166 *hw = DPORT_REG_GET_FIELD(DPORT_PMS_PRO_DPORT_1_REG, DPORT_PMS_PRO_DPORT_RTCSLOW_H_W); in memprot_ll_peri1_rtcslow_get_split_sgnf_bits()
167 *hr = DPORT_REG_GET_FIELD(DPORT_PMS_PRO_DPORT_1_REG, DPORT_PMS_PRO_DPORT_RTCSLOW_H_R); in memprot_ll_peri1_rtcslow_get_split_sgnf_bits()
172 DPORT_REG_SET_FIELD(DPORT_PMS_PRO_DPORT_1_REG, DPORT_PMS_PRO_DPORT_RTCSLOW_L_R, lr ? 1 : 0); in memprot_ll_peri1_rtcslow_set_read_perm()
173 DPORT_REG_SET_FIELD(DPORT_PMS_PRO_DPORT_1_REG, DPORT_PMS_PRO_DPORT_RTCSLOW_H_R, hr ? 1 : 0); in memprot_ll_peri1_rtcslow_set_read_perm()
178 DPORT_REG_SET_FIELD(DPORT_PMS_PRO_DPORT_1_REG, DPORT_PMS_PRO_DPORT_RTCSLOW_L_W, lw ? 1 : 0); in memprot_ll_peri1_rtcslow_set_write_perm()
179 DPORT_REG_SET_FIELD(DPORT_PMS_PRO_DPORT_1_REG, DPORT_PMS_PRO_DPORT_RTCSLOW_H_W, hw ? 1 : 0); in memprot_ll_peri1_rtcslow_set_write_perm()
184 return DPORT_READ_PERI_REG(DPORT_PMS_PRO_DPORT_1_REG); in memprot_ll_peri1_rtcslow_get_conf_reg()
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| /hal_espressif-3.6.0/components/soc/esp32s2/include/soc/ |
| D | sensitive_reg.h | 408 #define DPORT_PMS_PRO_DPORT_1_REG (DR_REG_SENSITIVE_BASE + 0x040) macro
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