Searched refs:DPORT_APP_CACHE_CTRL_REG (Results 1 – 6 of 6) sorted by relevance
/hal_espressif-3.6.0/components/esp_hw_support/port/esp32/ |
D | spiram.c | 277 if (DPORT_REG_GET_BIT(DPORT_APP_CACHE_CTRL_REG, DPORT_APP_CACHE_ENABLE)==0) { in esp_spiram_writeback_cache() 279 DPORT_SET_PERI_REG_BITS(DPORT_APP_CACHE_CTRL_REG, 1, 1, DPORT_APP_CACHE_ENABLE_S); in esp_spiram_writeback_cache() 311 DPORT_SET_PERI_REG_BITS(DPORT_APP_CACHE_CTRL_REG, 1, 0, DPORT_APP_CACHE_ENABLE_S); in esp_spiram_writeback_cache()
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D | spiram_psram.c | 1086 DPORT_CLEAR_PERI_REG_MASK(DPORT_APP_CACHE_CTRL_REG, DPORT_APP_DRAM_HL|DPORT_APP_DRAM_SPLIT); in psram_cache_init() 1089 DPORT_SET_PERI_REG_MASK(DPORT_APP_CACHE_CTRL_REG, DPORT_APP_DRAM_HL); in psram_cache_init() 1092 DPORT_SET_PERI_REG_MASK(DPORT_APP_CACHE_CTRL_REG, DPORT_APP_DRAM_SPLIT); in psram_cache_init()
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/hal_espressif-3.6.0/zephyr/esp_shared/src/host_flash/ |
D | cache_utils.c | 51 DPORT_SET_PERI_REG_BITS(DPORT_APP_CACHE_CTRL_REG, 1, 0, DPORT_APP_CACHE_ENABLE_S); in spi_flash_disable_cache() 79 DPORT_SET_PERI_REG_BITS(DPORT_APP_CACHE_CTRL_REG, 1, 1, DPORT_APP_CACHE_ENABLE_S); in spi_flash_restore_cache()
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/hal_espressif-3.6.0/components/esp_hw_support/port/esp32s2/ |
D | spiram_psram.c | 537 DPORT_CLEAR_PERI_REG_MASK(DPORT_APP_CACHE_CTRL_REG, DPORT_APP_DRAM_HL|DPORT_APP_DRAM_SPLIT); in psram_cache_init() 540 DPORT_SET_PERI_REG_MASK(DPORT_APP_CACHE_CTRL_REG, DPORT_APP_DRAM_HL); in psram_cache_init() 543 DPORT_SET_PERI_REG_MASK(DPORT_APP_CACHE_CTRL_REG, DPORT_APP_DRAM_SPLIT); in psram_cache_init()
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/hal_espressif-3.6.0/components/spi_flash/ |
D | cache_utils.c | 319 DPORT_SET_PERI_REG_BITS(DPORT_APP_CACHE_CTRL_REG, 1, 0, DPORT_APP_CACHE_ENABLE_S); in spi_flash_disable_cache() 347 DPORT_SET_PERI_REG_BITS(DPORT_APP_CACHE_CTRL_REG, 1, 1, DPORT_APP_CACHE_ENABLE_S); in spi_flash_restore_cache() 366 result = result && (DPORT_REG_GET_BIT(DPORT_APP_CACHE_CTRL_REG, DPORT_APP_CACHE_ENABLE) != 0); in spi_flash_cache_enabled()
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/hal_espressif-3.6.0/components/soc/esp32/include/soc/ |
D | dport_reg.h | 426 #define DPORT_APP_CACHE_CTRL_REG (DR_REG_DPORT_BASE + 0x058) macro
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