Searched refs:DPORT_APP_CACHE_CTRL_REG (Results 1 – 6 of 6) sorted by relevance
| /hal_espressif-2.7.6/zephyr/esp32/include/common/ |
| D | cache_utils.h | 31 DPORT_SET_PERI_REG_BITS(DPORT_APP_CACHE_CTRL_REG, 1, 0, DPORT_APP_CACHE_ENABLE_S); in esp32_disable_cache()
42 DPORT_SET_PERI_REG_BITS(DPORT_APP_CACHE_CTRL_REG, 1, 1, DPORT_APP_CACHE_ENABLE_S); in esp32_restore_cache()
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| /hal_espressif-2.7.6/components/esp32/ |
| D | spiram.c | 257 if (DPORT_REG_GET_BIT(DPORT_APP_CACHE_CTRL_REG, DPORT_APP_CACHE_ENABLE)==0) { in esp_spiram_writeback_cache()
259 DPORT_SET_PERI_REG_BITS(DPORT_APP_CACHE_CTRL_REG, 1, 1, DPORT_APP_CACHE_ENABLE_S); in esp_spiram_writeback_cache()
291 DPORT_SET_PERI_REG_BITS(DPORT_APP_CACHE_CTRL_REG, 1, 0, DPORT_APP_CACHE_ENABLE_S); in esp_spiram_writeback_cache()
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| D | spiram_psram.c | 1071 DPORT_CLEAR_PERI_REG_MASK(DPORT_APP_CACHE_CTRL_REG, DPORT_APP_DRAM_HL|DPORT_APP_DRAM_SPLIT); in psram_cache_init()
1074 DPORT_SET_PERI_REG_MASK(DPORT_APP_CACHE_CTRL_REG, DPORT_APP_DRAM_HL); in psram_cache_init()
1077 DPORT_SET_PERI_REG_MASK(DPORT_APP_CACHE_CTRL_REG, DPORT_APP_DRAM_SPLIT); in psram_cache_init()
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| /hal_espressif-2.7.6/components/esp32s2/ |
| D | spiram_psram.c | 532 DPORT_CLEAR_PERI_REG_MASK(DPORT_APP_CACHE_CTRL_REG, DPORT_APP_DRAM_HL|DPORT_APP_DRAM_SPLIT); in psram_cache_init()
535 DPORT_SET_PERI_REG_MASK(DPORT_APP_CACHE_CTRL_REG, DPORT_APP_DRAM_HL); in psram_cache_init()
538 DPORT_SET_PERI_REG_MASK(DPORT_APP_CACHE_CTRL_REG, DPORT_APP_DRAM_SPLIT); in psram_cache_init()
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| /hal_espressif-2.7.6/components/spi_flash/ |
| D | cache_utils.c | 311 DPORT_SET_PERI_REG_BITS(DPORT_APP_CACHE_CTRL_REG, 1, 0, DPORT_APP_CACHE_ENABLE_S); in spi_flash_disable_cache()
339 DPORT_SET_PERI_REG_BITS(DPORT_APP_CACHE_CTRL_REG, 1, 1, DPORT_APP_CACHE_ENABLE_S); in spi_flash_restore_cache()
358 result = result && (DPORT_REG_GET_BIT(DPORT_APP_CACHE_CTRL_REG, DPORT_APP_CACHE_ENABLE) != 0); in spi_flash_cache_enabled()
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| /hal_espressif-2.7.6/components/soc/esp32/include/soc/ |
| D | dport_reg.h | 426 #define DPORT_APP_CACHE_CTRL_REG (DR_REG_DPORT_BASE + 0x058) macro
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