Searched refs:REG_TC3_IMR0 (Results 1 – 4 of 4) sorted by relevance
48 #define REG_TC3_IMR0 (0x4005402C) /**< (TC3) Interrupt Mask Register (channel = 0) 0 */ macro98 #define REG_TC3_IMR0 (*(__I uint32_t*)0x4005402CU) /**< (TC3) Interrupt Mask Register (… macro
48 #define REG_TC3_IMR0 (0x4005402C) /**< (TC3) Interrupt Mask Register (channel = 0) 0 */ macro99 #define REG_TC3_IMR0 (*(__I uint32_t*)0x4005402CU) /**< (TC3) Interrupt Mask Register (… macro