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Searched refs:REG_TC3_IDR2 (Results 1 – 4 of 4) sorted by relevance

/hal_atmel-3.6.0/asf/sam/include/same70/instance/
Dtc3.h73 #define REG_TC3_IDR2 (0x400540A8) /**< (TC3) Interrupt Disable Register (channel = 0) 2 … macro
123 #define REG_TC3_IDR2 (*(__O uint32_t*)0x400540A8U) /**< (TC3) Interrupt Disable Registe… macro
/hal_atmel-3.6.0/asf/sam/include/same70b/instance/
Dtc3.h73 #define REG_TC3_IDR2 (0x400540A8) /**< (TC3) Interrupt Disable Register (channel = 0) 2 … macro
123 #define REG_TC3_IDR2 (*(__O uint32_t*)0x400540A8U) /**< (TC3) Interrupt Disable Registe… macro
/hal_atmel-3.6.0/asf/sam/include/samv71/instance/
Dtc3.h73 #define REG_TC3_IDR2 (0x400540A8) /**< (TC3) Interrupt Disable Register (channel = 0) 2 … macro
124 #define REG_TC3_IDR2 (*(__O uint32_t*)0x400540A8U) /**< (TC3) Interrupt Disable Registe… macro
/hal_atmel-3.6.0/asf/sam/include/samv71b/instance/
Dtc3.h73 #define REG_TC3_IDR2 (0x400540A8) /**< (TC3) Interrupt Disable Register (channel = 0) 2 … macro
123 #define REG_TC3_IDR2 (*(__O uint32_t*)0x400540A8U) /**< (TC3) Interrupt Disable Registe… macro