Searched refs:REG_PIOC_AIMMR (Results 1 – 7 of 7) sorted by relevance
71 #define REG_PIOC_AIMMR (0x400E12B8U) /**< \brief (PIOC) Additional Interrupt Modes Mas… macro126 #define REG_PIOC_AIMMR (*(RoReg*)0x400E12B8U) /**< \brief (PIOC) Additional Interrupt Modes Mas… macro
68 …#define REG_PIOC_AIMMR (0x400E12B8U) /**< \brief (PIOC) Additional Interrupt Mod… macro112 …#define REG_PIOC_AIMMR (*(__I uint32_t*)0x400E12B8U) /**< \brief (PIOC) Additional Interrupt Mod… macro
75 #define REG_PIOC_AIMMR (0x400E12B8) /**< (PIOC) Additional Interrupt Modes Mask Register */ macro134 #define REG_PIOC_AIMMR (*(__I uint32_t*)0x400E12B8U) /**< (PIOC) Additional Interrupt Mod… macro
71 …#define REG_PIOC_AIMMR (0x400E12B8U) /**< \brief (PIOC) Additional Interrupt Mo… macro125 …#define REG_PIOC_AIMMR (*(__I uint32_t*)0x400E12B8U) /**< \brief (PIOC) Additional Interrupt Mo… macro
75 #define REG_PIOC_AIMMR (0x400E12B8) /**< (PIOC) Additional Interrupt Modes Mask Register */ macro135 #define REG_PIOC_AIMMR (*(__I uint32_t*)0x400E12B8U) /**< (PIOC) Additional Interrupt Mod… macro