Searched refs:NBIT2 (Results 1 – 7 of 7) sorted by relevance
74 #define SHA256_CTRL_HASH_HASH_MASK (NBIT2)86 #define SHA256_REGS_SHA256_CTRL_CORE_TO_AHB_CLK_RATIO_MASK (NBIT2+ NBIT1+ NBIT0)99 #define SHA256_COND_CHK_CTRL_STEP_VAL_MASK (NBIT6 | NBIT5 | NBIT4 | NBIT3 | NBIT2)135 #define BIGINT_MISC_CTRL_CTL_MSW_FIRST (NBIT2)155 #define BIGINT_IRQ_STS_M_READ (NBIT2)
78 #define rHAVE_SLEEP_CLK_SRC_RTC_BIT (NBIT2)
333 reg |= ((u8Opcode & NBIT7) ? (NBIT2):(0)); /*Data = 1 or config*/ in hif_send()
343 if(clk_status_reg & NBIT2) { in chip_wake()
114 #define NBIT2 (0x00000004) macro
292 #define SSL_CIPHER_DHE_RSA_WITH_AES_128_CBC_SHA NBIT2
75 #define SSL_FLAGS_2_RESERVD NBIT2