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/hal_ambiq-3.6.0/mcu/apollo4p/regs/
Dam_mcu_apollo4p_otp.h46 #define AM_REG_OTPn(n) 0x400C2000 argument
682 #define AM_REG_OTP_ROT0_ROT0(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF) argument
689 #define AM_REG_OTP_ROT1_ROT1(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF) argument
696 #define AM_REG_OTP_ROT2_ROT2(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF) argument
703 #define AM_REG_OTP_ROT3_ROT3(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF) argument
710 #define AM_REG_OTP_ROT4_ROT4(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF) argument
717 #define AM_REG_OTP_ROT5_ROT5(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF) argument
724 #define AM_REG_OTP_ROT6_ROT6(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF) argument
731 #define AM_REG_OTP_ROT7_ROT7(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF) argument
738 #define AM_REG_OTP_KCP0_KCP0(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF) argument
[all …]
Dam_mcu_apollo4p_info1.h46 #define AM_REG_INFO1n(n) 0x42002000 argument
142 #define AM_REG_INFO1_SBL_VERSION_0_VERSION(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF) argument
149 #define AM_REG_INFO1_SBL_VERSION_1_DATECODE(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF) argument
156 #define AM_REG_INFO1_SBR_VERSION_0_VERSION(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF) argument
163 #define AM_REG_INFO1_MAINPTR_ADDRESS(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF) argument
170 #define AM_REG_INFO1_RESETSTATUS_STATUS(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF) argument
177 #define AM_REG_INFO1_SBLOTA_ADDRESS(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF) argument
184 #define AM_REG_INFO1_SOCID0_ID(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF) argument
191 #define AM_REG_INFO1_SOCID1_ID(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF) argument
198 #define AM_REG_INFO1_SOCID2_ID(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF) argument
[all …]
Dam_reg.h57 #define AM_REG_APBDMAn(n) \ argument
58 (REG_APBDMA_BASEADDR + 0x00001000 * n)
67 #define AM_REG_CLKGENn(n) \ argument
68 (REG_CLKGEN_BASEADDR + 0x00000000 * n)
77 #define AM_REG_CRYPTOn(n) \ argument
78 (REG_CRYPTO_BASEADDR + 0x00000000 * n)
87 #define AM_REG_RSTGENn(n) \ argument
88 (REG_RSTGEN_BASEADDR + 0x00000000 * n)
97 #define AM_REG_RTCn(n) \ argument
98 (REG_RTC_BASEADDR + 0x00000000 * n)
[all …]
Dam_mcu_apollo4p_info0.h46 #define AM_REG_INFO0n(n) 0x42000000 argument
88 #define AM_REG_INFO0_SIGNATURE0_SIG0(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF) argument
95 #define AM_REG_INFO0_SIGNATURE1_SIG1(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF) argument
102 #define AM_REG_INFO0_SIGNATURE2_SIG2(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF) argument
109 #define AM_REG_INFO0_SIGNATURE3_SIG3(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF) argument
116 #define AM_REG_INFO0_CUSTOMER_TRIM_ERR001_MUSTBE_0(n) (((uint32_t)(n) << 0) & 0x00000001) argument
123 #define AM_REG_INFO0_SECURITY_WIRED_IFC_CFG0_RSVD30(n) (((uint32_t)(n) << 30) & 0xC0000000) argument
128 #define AM_REG_INFO0_SECURITY_WIRED_IFC_CFG0_BAUDRATE(n) (((uint32_t)(n) << 8) & 0x3FFFFF00) argument
133 #define AM_REG_INFO0_SECURITY_WIRED_IFC_CFG0_DATALEN(n) (((uint32_t)(n) << 6) & 0x000000C0) argument
138 #define AM_REG_INFO0_SECURITY_WIRED_IFC_CFG0_2STOP(n) (((uint32_t)(n) << 5) & 0x00000020) argument
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Dam_reg_itm.h53 #define AM_REG_ITMn(n) \ argument
54 (REG_ITM_BASEADDR + 0x00000000 * n)
Dam_reg_sysctrl.h53 #define AM_REG_SYSCTRLn(n) \ argument
54 (REG_SYSCTRL_BASEADDR + 0x00000000 * n)
Dam_reg_tpiu.h53 #define AM_REG_TPIUn(n) \ argument
54 (REG_TPIU_BASEADDR + 0x00000000 * n)
Dam_reg_macros.h75 #define AM_REGADDRn(periph, n, reg) ( periph##0_BASE + \ argument
77 (n * (periph##1_BASE - periph##0_BASE)) )
Dam_reg_jedec.h54 #define AM_REG_JEDECn(n) \ argument
55 (REG_JEDEC_BASEADDR + 0x00000000 * n)
/hal_ambiq-3.6.0/mcu/apollo4p/hal/
Dam_hal_gpio.h762 #define AM_HAL_MASK32(n) ((uint32_t)1 << ((n) & 0x1F)) argument
798 #define am_hal_gpio_input_read(n) ((*AM_HAL_GPIO_RDn((n)) >> ((n) % 32)) & 1) argument
799 #define am_hal_gpio_output_read(n) ((*AM_HAL_GPIO_WTn((n)) >> ((n) % 32)) & 1) argument
800 #define am_hal_gpio_enable_read(n) ((*AM_HAL_GPIO_ENn((n)) >> ((n) % 32)) & 1) argument
836 #define am_hal_gpio_output_clear(n) (*AM_HAL_GPIO_WTCn((n)) = AM_HAL_MASK32(n)) argument
837 #define am_hal_gpio_output_set(n) (*AM_HAL_GPIO_WTSn((n)) = AM_HAL_MASK32(n)) argument
838 #define am_hal_gpio_output_toggle(n) \ argument
842 (*AM_HAL_GPIO_WTn((n)) ^= AM_HAL_MASK32(n)); \
846 #define am_hal_gpio_output_tristate_output_dis(n) (*AM_HAL_GPIO_ENCn((n)) = AM_HAL_MASK32(n)) argument
847 #define am_hal_gpio_output_tristate_output_en(n) (*AM_HAL_GPIO_ENSn((n)) = AM_HAL_MASK32(n)) argument
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Dam_hal_global.h222 #define STRINGIZE_VAL(n) STRINGIZE_VAL2(n) argument
223 #define STRINGIZE_VAL2(n) #n argument
Dam_hal_stimer.h61 #define AM_REG_STIMER_COMPARE(n, r) ((&STIMER->SCMPR0) + \ argument
66 #define AM_REG_STIMER_CAPTURE(n, r) ((&STIMER->SCAPT0) + \ argument
71 #define AM_REG_STIMER_NVRAM(n, r) ((&STIMER->SNVR0) + \ argument
Dam_hal_pdm.h62 #define PDMn(n) ((PDM0_Type*)(PDM0_BASE + (n * (PDM1_BASE - PDM0_BASE)))) argument
Dam_hal_adc.h55 #define ADCn(n) ((ADC_Type*)(ADC_BASE + (n * (ADC_BASE - ADC_BASE)))) argument
Dam_hal_i2s.h60 #define I2Sn(n) ((I2S0_Type*)(I2S0_BASE + (n * (I2S1_BASE - I2S0_BASE)))) argument
/hal_ambiq-3.6.0/components/bluetooth/
Dam_devices_cooper.h65 #define UINT16_TO_BYTE0(n) ((uint8_t) (n)) argument
66 #define UINT16_TO_BYTE1(n) ((uint8_t) ((n) >> 8)) argument
67 #define UINT32_TO_BYTE0(n) ((uint8_t) (n)) argument
68 #define UINT32_TO_BYTE1(n) ((uint8_t) ((n) >> 8)) argument
69 #define UINT32_TO_BYTE2(n) ((uint8_t) ((n) >> 16)) argument
70 #define UINT32_TO_BYTE3(n) ((uint8_t) ((n) >> 24)) argument
321 #define HCI_VSC_CMD_LENGTH(n) (HCI_VSC_CMD_HEADER_LENGTH + n) argument
/hal_ambiq-3.6.0/mcu/apollo4p/hal/mcu/
Dam_hal_mspi.h60 #define MSPIn(n) ((MSPI0_Type*)(MSPI0_BASE + (n * (MSPI1_BASE - MSPI0_BASE)))) argument
61 #define MSPI_IRQn(n) MSPI_IRQn_temp(n) argument
62 #define MSPI_APERTURE_START_ADDRn(n) (MSPI0_APERTURE_START_ADDR + 0x04000000*(n)) argument
63 #define MSPI_APERTURE_END_ADDRn(n) (MSPI0_APERTURE_END_ADDR + 0x04000000*(n)) argument
146 #define MSPI_IRQn_temp(n) (MSPI##n##_IRQn) argument
147 #define MSPI_APERTURE_START_ADDRn_temp(n) (MSPI##n##_APERTURE_START_ADDR) argument
148 #define MSPI_APERTURE_END_ADDRn_temp(n) (MSPI##n##_APERTURE_END_ADDR) argument
Dam_hal_utils.c90 #define BOOTROM_CYCLES_US(n) (((n) * CYCLESPERITER) + 0) argument
91 #define BOOTROM_CYCLES_US_NOCACHE(n) ( (n == 0) ? 0 : (n * CYCLESPERITER) - 5) argument
Dam_hal_mcu.h57 #define am_count_num_leading_zeros(n) __CLZ(n) argument
59 #define am_count_num_leading_zeros(n) __builtin_clz(n) argument
Dam_hal_ios.h60 #define IOSLAVEn(n) ((IOSLAVE_Type*)(IOSLAVE_BASE + (n * (IOSLAVE_BASE - IOSLAVE_BASE)))) argument
81 #define AM_HAL_IOS_I2C_ADDRESS(n) _VAL2FLD(IOSLAVE_CFG_I2CADDR, n) argument
Dam_hal_sdhc.h60 #define SDHCn(n) ((SDIO_Type*)(SDIO_BASE + n)) argument
Dam_hal_uart.h61 #define UARTn(n) ((UART0_Type*)(UART0_BASE + (n * (UART1_BASE - UART0_BASE)))) argument
/hal_ambiq-3.6.0/utils/
Dam_util_stdio.c1179 am_util_stdio_vsnprintf(char *pcBuf, uint32_t n, const char *pcFmt, in am_util_stdio_vsnprintf() argument
1184 if (n >= AM_PRINTF_BUFSIZE) in am_util_stdio_vsnprintf()
1191 if (ui32NumChars >= n) in am_util_stdio_vsnprintf()
1205 am_util_stdio_snprintf(char *pcBuf, uint32_t n, const char *pcFmt, ...) in am_util_stdio_snprintf() argument
1211 ui32CharCnt = am_util_stdio_vsnprintf(pcBuf, n, pcFmt, pArgs); in am_util_stdio_snprintf()
Dam_util_stdio.h217 extern uint32_t am_util_stdio_vsnprintf(char *pcBuf, uint32_t n, const char *pcFmt,
242 extern uint32_t am_util_stdio_snprintf(char *pcBuf, uint32_t n, const char *pcFmt, ...);
Dam_util_regdump.h179 #define REGDUMP_MOD(n) (1 << n) argument

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