Home
last modified time | relevance | path

Searched refs:offset (Results 1 – 23 of 23) sorted by relevance

/acpica-3.7.0/tests/aslts/src/runtime/collections/functional/descriptor/
Dextendedspace.asl386 Byte 32 (Address Translation offset, _TRA bits [7:0]):
388 offset that must be added to the address on the secondary side to obtain
390 Address Translation offset bits
391 Byte 33 (Address Translation offset, _TRA bits[15:8])
392 Byte 34 (Address Translation offset, _TRA bits[23:16])
393 Byte 35 (Address Translation offset, _TRA bits[31:24])
394 Byte 36 (Address Translation offset, _TRA bits[39:32])
395 Byte 37 (Address Translation offset, _TRA bits[47:40])
396 Byte 38 (Address Translation offset, _TRA bits[55:48])
397 Byte 39 (Address Translation offset, _TRA bits[63:56])
Dqwordspace.asl391 Byte 30 (Address Translation offset, _TRA bits [7:0]):
393 offset that must be added to the address on the secondary side to obtain
395 Address Translation offset bits
396 Byte 31 (Address Translation offset, _TRA bits[15:8])
397 Byte 32 (Address Translation offset, _TRA bits[23:16])
398 Byte 33 (Address Translation offset, _TRA bits[31:24])
399 Byte 34 (Address Translation offset, _TRA bits[39:32])
400 Byte 35 (Address Translation offset, _TRA bits[47:40])
401 Byte 36 (Address Translation offset, _TRA bits[55:48])
402 Byte 37 (Address Translation offset, _TRA bits[63:56])
Dqwordio.asl531 Byte 30 (Address Translation offset, _TRA bits [7:0]):
533 offset that must be added to the address on the secondary side to obtain
535 Address Translation offset bits
536 Byte 31 (Address Translation offset, _TRA bits[15:8])
537 Byte 32 (Address Translation offset, _TRA bits[23:16])
538 Byte 33 (Address Translation offset, _TRA bits[31:24])
539 Byte 34 (Address Translation offset, _TRA bits[39:32])
540 Byte 35 (Address Translation offset, _TRA bits[47:40])
541 Byte 36 (Address Translation offset, _TRA bits[55:48])
542 Byte 37 (Address Translation offset, _TRA bits[63:56])
Dextendedio.asl536 Byte 32 (Address Translation offset, _TRA bits [7:0]):
538 offset that must be added to the address on the secondary side to obtain
540 Address Translation offset bits
541 Byte 33 (Address Translation offset, _TRA bits[15:8])
542 Byte 34 (Address Translation offset, _TRA bits[23:16])
543 Byte 35 (Address Translation offset, _TRA bits[31:24])
544 Byte 36 (Address Translation offset, _TRA bits[39:32])
545 Byte 37 (Address Translation offset, _TRA bits[47:40])
546 Byte 38 (Address Translation offset, _TRA bits[55:48])
547 Byte 39 (Address Translation offset, _TRA bits[63:56])
Ddwordspace.asl379 Byte 18 (Address Translation offset, _TRA bits [7:0]):
381 offset that must be added to the address on the secondary side to obtain
383 Address Translation offset bits
384 Byte 19 (Address Translation offset, _TRA bits[15:8])
385 Byte 20 (Address Translation offset, _TRA bits[23:16])
386 Byte 21 (Address Translation offset, _TRA bits[31:24])
Dwordbusnumber.asl352 Byte 12 (Address Translation offset, _TRA bits [7:0]):
354 offset that must be added to the address on the secondary side to obtain
356 Address Translation offset bits
357 Byte 13 (Address Translation offset, _TRA bits[15:8])
Ddwordio.asl519 Byte 18 (Address Translation offset, _TRA bits [7:0]):
521 offset that must be added to the address on the secondary side to obtain
523 Address Translation offset bits
524 Byte 19 (Address Translation offset, _TRA bits[15:8])
525 Byte 20 (Address Translation offset, _TRA bits[23:16])
526 Byte 21 (Address Translation offset, _TRA bits[31:24])
Dqwordmemory.asl1096 Byte 30 (Address Translation offset, _TRA bits [7:0]):
1098 offset that must be added to the address on the secondary side to obtain
1100 Address Translation offset bits
1101 Byte 31 (Address Translation offset, _TRA bits[15:8])
1102 Byte 32 (Address Translation offset, _TRA bits[23:16])
1103 Byte 33 (Address Translation offset, _TRA bits[31:24])
1104 Byte 34 (Address Translation offset, _TRA bits[39:32])
1105 Byte 35 (Address Translation offset, _TRA bits[47:40])
1106 Byte 36 (Address Translation offset, _TRA bits[55:48])
1107 Byte 37 (Address Translation offset, _TRA bits[63:56])
Dwordspace.asl373 Byte 12 (Address Translation offset, _TRA bits [7:0]):
375 offset that must be added to the address on the secondary side to obtain
377 Address Translation offset bits
378 Byte 13 (Address Translation offset, _TRA bits[15:8])
Dextendedmemory.asl1153 Byte 32 (Address Translation offset, _TRA bits [7:0]):
1155 offset that must be added to the address on the secondary side to obtain
1157 Address Translation offset bits
1158 Byte 33 (Address Translation offset, _TRA bits[15:8])
1159 Byte 34 (Address Translation offset, _TRA bits[23:16])
1160 Byte 35 (Address Translation offset, _TRA bits[31:24])
1161 Byte 36 (Address Translation offset, _TRA bits[39:32])
1162 Byte 37 (Address Translation offset, _TRA bits[47:40])
1163 Byte 38 (Address Translation offset, _TRA bits[55:48])
1164 Byte 39 (Address Translation offset, _TRA bits[63:56])
Dwordio.asl513 Byte 12 (Address Translation offset, _TRA bits [7:0]):
515 offset that must be added to the address on the secondary side to obtain
517 Address Translation offset bits
518 Byte 13 (Address Translation offset, _TRA bits[15:8])
Ddwordmemory.asl1084 Byte 18 (Address Translation offset, _TRA bits [7:0]):
1086 offset that must be added to the address on the secondary side to obtain
1088 Address Translation offset bits
1089 Byte 19 (Address Translation offset, _TRA bits[15:8])
1090 Byte 20 (Address Translation offset, _TRA bits[23:16])
1091 Byte 21 (Address Translation offset, _TRA bits[31:24])
Dregister.asl217 Byte 5 Register Bit Offset, _RBO Indicates the offset to the start of the register in bits
/acpica-3.7.0/tests/aslts/src/runtime/collections/bdemo/ACPICA/0052/
DDECL.asl31 …* SUMMARY: The EdgeLevel offset of Interrupt macro (_HE) is specified as 25-th bit but actually it…
/acpica-3.7.0/tests/aslts/
DMakefile.def110 rm $$j.offset.h; \
/acpica-3.7.0/source/compiler/
Ddttable1.c929 unsigned int idx, offset, max = 0; in DtCompileCedt() local
940 offset = (unsigned int) ACPI_OFFSET (ACPI_CEDT_CFMWS, InterleaveWays); in DtCompileCedt()
942 max = 0x01 << dump[offset]; /* 2^max, so 0=1, 1=2, 2=4, 3=8. 8 is MAX */ in DtCompileCedt()
/acpica-3.7.0/tests/aslts/src/runtime/collections/functional/region/
Dindexfield.asl461 /* and check possible inconsistence, 0-bit offset. */
534 /* and check possible inconsistence, 1-bit offset. */
607 /* and check possible inconsistence, 2-bit offset. */
680 /* and check possible inconsistence, 3-bit offset. */
753 /* and check possible inconsistence, 4-bit offset. */
826 /* and check possible inconsistence, 5-bit offset. */
899 /* and check possible inconsistence, 6-bit offset. */
972 /* and check possible inconsistence, 7-bit offset. */
1045 /* and check possible inconsistence, 8-bit offset. */
1118 /* and check possible inconsistence, 2046-bit offset. */
Dbankfield.asl17929 /* and check possible inconsistence, 0-bit offset. */
18002 /* and check possible inconsistence, 1-bit offset. */
18075 /* and check possible inconsistence, 2-bit offset. */
18148 /* and check possible inconsistence, 3-bit offset. */
18221 /* and check possible inconsistence, 4-bit offset. */
18294 /* and check possible inconsistence, 5-bit offset. */
18367 /* and check possible inconsistence, 6-bit offset. */
18440 /* and check possible inconsistence, 7-bit offset. */
18513 /* and check possible inconsistence, 8-bit offset. */
18586 /* and check possible inconsistence, 2046-bit offset. */
Dregionfield.asl118 /* - <index of first offset>, */
1961 /* and check possible inconsistence, 0-bit offset. */
2028 /* and check possible inconsistence, 1-bit offset. */
2095 /* and check possible inconsistence, 2-bit offset. */
2162 /* and check possible inconsistence, 3-bit offset. */
2229 /* and check possible inconsistence, 4-bit offset. */
2296 /* and check possible inconsistence, 5-bit offset. */
2363 /* and check possible inconsistence, 6-bit offset. */
2430 /* and check possible inconsistence, 7-bit offset. */
2497 /* and check possible inconsistence, 8-bit offset. */
[all …]
/acpica-3.7.0/tests/aslts/adm/BugState/
DALLBUGS_DUP59 …52| I | | | | | The EdgeLevel offset of Interrupt macro (_HE) i…
DALLBUGS59 …52| I | | | | | The EdgeLevel offset of Interrupt macro (_HE) i…
/acpica-3.7.0/documents/
Dchanges.txt93 Generic Serial Bus as it needs to know platform specific offset and
1729 automatically, these Offsets simply refer to the current offset and are
1739 Offset (4), // Redundant, offset is already 4 (bytes)
2768 Fix the disassembly of the SMMU GSU interrupt offset.
2977 -o: start compare at this offset into the second file
4504 have been made: The Address is now defined to be the offset in bits of
5558 offset table):
5729 (generates AML offset table for BIOS support.)
5877 BIOS code. Adds support for a new "offset table" output file. The -so
6331 incorrect table offset reported for invalid opcodes. Report the original
[all …]
/acpica-3.7.0/tests/misc/
Dgrammar.asl9235 // Declare an OpRegion in Memory starting at offset 0x400000 that is 10 bytes long
9292 // Declare an OpRegion in Memory starting at offset 0x400000 that is 10 bytes long