Searched refs:gpio_cfg (Results 1 – 4 of 4) sorted by relevance
32 mxc_gpio_cfg_t gpio_cfg; in pinctrl_configure_pin() local43 gpio_cfg.port = (mxc_gpio_regs_t *)gpios[port]; in pinctrl_configure_pin()44 gpio_cfg.mask = BIT(pin); in pinctrl_configure_pin()47 gpio_cfg.pad = MXC_GPIO_PAD_PULL_UP; in pinctrl_configure_pin()49 gpio_cfg.pad = MXC_GPIO_PAD_PULL_DOWN; in pinctrl_configure_pin()51 gpio_cfg.pad = MXC_GPIO_PAD_NONE; in pinctrl_configure_pin()55 gpio_cfg.func = MXC_GPIO_FUNC_IN; in pinctrl_configure_pin()57 gpio_cfg.func = MXC_GPIO_FUNC_OUT; in pinctrl_configure_pin()60 gpio_cfg.func = (mxc_gpio_func_t)(afx + 1); in pinctrl_configure_pin()64 gpio_cfg.vssel = MXC_GPIO_VSSEL_VDDIOH; in pinctrl_configure_pin()[all …]
76 mxc_gpio_cfg_t gpio_cfg; in api_pin_configure() local84 gpio_cfg.port = cfg->regs; in api_pin_configure()85 gpio_cfg.mask = BIT(pin); in api_pin_configure()88 gpio_cfg.pad = MXC_GPIO_PAD_PULL_UP; in api_pin_configure()90 gpio_cfg.pad = MXC_GPIO_PAD_PULL_DOWN; in api_pin_configure()92 gpio_cfg.pad = MXC_GPIO_PAD_WEAK_PULL_UP; in api_pin_configure()94 gpio_cfg.pad = MXC_GPIO_PAD_WEAK_PULL_DOWN; in api_pin_configure()96 gpio_cfg.pad = MXC_GPIO_PAD_NONE; in api_pin_configure()100 gpio_cfg.func = MXC_GPIO_FUNC_OUT; in api_pin_configure()102 gpio_cfg.func = MXC_GPIO_FUNC_IN; in api_pin_configure()[all …]
148 GPIOCfgTypeDef gpio_cfg; in gpio_eos_s3_configure() local155 gpio_cfg.ucGpioNum = gpio_num; in gpio_eos_s3_configure()156 gpio_cfg.xPadConf = &pad_config; in gpio_eos_s3_configure()160 gpio_cfg.xPadConf->ucPull = PAD_PULLUP; in gpio_eos_s3_configure()162 gpio_cfg.xPadConf->ucPull = PAD_PULLDOWN; in gpio_eos_s3_configure()165 gpio_cfg.xPadConf->ucPull = PAD_NOPULL; in gpio_eos_s3_configure()169 gpio_cfg.xPadConf->ucMode = PAD_MODE_INPUT_EN; in gpio_eos_s3_configure()170 gpio_cfg.xPadConf->ucSmtTrg = PAD_SMT_TRIG_EN; in gpio_eos_s3_configure()179 gpio_cfg.xPadConf->ucMode = PAD_MODE_OUTPUT_EN; in gpio_eos_s3_configure()183 gpio_cfg.xPadConf->ucMode = PAD_MODE_INPUT_EN; in gpio_eos_s3_configure()[all …]
31 uint32_t gpio_cfg[32]; member84 gpio->gpio_cfg[pin] |= MSS_GPIO_OUTPUT_MODE; in mss_gpio_config()95 gpio->gpio_cfg[pin] |= MSS_GPIO_INPUT_MODE; in mss_gpio_config()163 gpio->gpio_cfg[pin] |= (MSS_GPIO_INT_ENABLE_MASK); in mss_gpio_pin_interrupt_configure()167 gpio->gpio_cfg[pin] |= (MSS_GPIO_IRQ_EDGE_BOTH); in mss_gpio_pin_interrupt_configure()170 gpio->gpio_cfg[pin] |= (MSS_GPIO_IRQ_EDGE_POSITIVE); in mss_gpio_pin_interrupt_configure()173 gpio->gpio_cfg[pin] |= (MSS_GPIO_IRQ_EDGE_NEGATIVE); in mss_gpio_pin_interrupt_configure()176 gpio->gpio_cfg[pin] |= (MSS_GPIO_IRQ_LEVEL_LOW); in mss_gpio_pin_interrupt_configure()179 gpio->gpio_cfg[pin] |= (MSS_GPIO_IRQ_LEVEL_HIGH); in mss_gpio_pin_interrupt_configure()182 gpio->gpio_cfg[pin] &= ~MSS_GPIO_INT_ENABLE_MASK; in mss_gpio_pin_interrupt_configure()
