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/Zephyr-latest/drivers/clock_control/
Dclock_control_numaker_scc.c17 uint32_t clk_base; member
121 LOG_DBG("CLK base: 0x%08x", cfg->clk_base); in numaker_scc_init()
151 .clk_base = DT_INST_REG_ADDR(inst), \