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Searched refs:XTENSA_MPU_ACCESS_P_RW_U_RW (Results 1 – 2 of 2) sorted by relevance

/Zephyr-latest/include/zephyr/arch/xtensa/
Dmpu.h74 #define XTENSA_MPU_ACCESS_P_RW_U_RW (14) macro
234 case XTENSA_MPU_ACCESS_P_RW_U_RW: in xtensa_mem_partition_is_writable()
254 ((k_mem_partition_attr_t) {XTENSA_MPU_ACCESS_P_RW_U_RW})
/Zephyr-latest/arch/xtensa/core/
Dmpu.c816 case XTENSA_MPU_ACCESS_P_RW_U_RW: in arch_mem_domain_partition_remove()
927 XTENSA_MPU_ACCESS_P_RW_U_RW, in arch_mem_domain_thread_add()
1043 case XTENSA_MPU_ACCESS_P_RW_U_RW: in arch_buffer_validate()
1065 case XTENSA_MPU_ACCESS_P_RW_U_RW: in arch_buffer_validate()
1123 case XTENSA_MPU_ACCESS_P_RW_U_RW: in xtensa_mem_kernel_has_access()
1153 case XTENSA_MPU_ACCESS_P_RW_U_RW: in xtensa_mem_kernel_has_access()
1188 XTENSA_MPU_ACCESS_P_RW_U_RW, in xtensa_user_stack_perms()