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Searched refs:PLL_SEL (Results 1 – 2 of 2) sorted by relevance

/Zephyr-latest/soc/sifive/sifive_freedom/fe300/
Dclock.c56 PRCI_REG(PRCI_PLLCFG) |= PLL_SEL(1); in soc_early_init_hook()
Dprci.h37 #define PLL_SEL(x) (((x) & 0x1) << 16) macro