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Searched refs:MAX32_DMA_SLOT_SPI1_RX (Results 1 – 13 of 13) sorted by relevance

/Zephyr-latest/include/zephyr/dt-bindings/dma/
Dmax32662_dma.h12 #define MAX32_DMA_SLOT_SPI1_RX 0x02U macro
Dmax32675_dma.h12 #define MAX32_DMA_SLOT_SPI1_RX 0x02U macro
Dmax32666_dma.h11 #define MAX32_DMA_SLOT_SPI1_RX 0x01U macro
Dmax32680_dma.h11 #define MAX32_DMA_SLOT_SPI1_RX 0x01U macro
Dmax32655_dma.h11 #define MAX32_DMA_SLOT_SPI1_RX 0x01U macro
Dmax32670_dma.h12 #define MAX32_DMA_SLOT_SPI1_RX 0x02U macro
Dmax32672_dma.h12 #define MAX32_DMA_SLOT_SPI1_RX 0x02U macro
Dmax32690_dma.h12 #define MAX32_DMA_SLOT_SPI1_RX 0x02U macro
/Zephyr-latest/tests/drivers/spi/spi_loopback/boards/
Dmax32655fthr_max32655_m4.overlay8 dmas = <&dma0 1 MAX32_DMA_SLOT_SPI1_TX>, <&dma0 2 MAX32_DMA_SLOT_SPI1_RX>;
Dmax32666fthr_max32666_cpu0.overlay8 dmas = <&dma0 1 MAX32_DMA_SLOT_SPI1_TX>, <&dma0 2 MAX32_DMA_SLOT_SPI1_RX>;
Dmax32672evkit.overlay8 dmas = <&dma0 1 MAX32_DMA_SLOT_SPI1_TX>, <&dma0 2 MAX32_DMA_SLOT_SPI1_RX>;
Dmax32672fthr.overlay8 dmas = <&dma0 1 MAX32_DMA_SLOT_SPI1_TX>, <&dma0 2 MAX32_DMA_SLOT_SPI1_RX>;
Dmax32675evkit.overlay8 dmas = <&dma0 1 MAX32_DMA_SLOT_SPI1_TX>, <&dma0 2 MAX32_DMA_SLOT_SPI1_RX>;