Searched refs:I2S_STATE_READY (Results 1 – 8 of 8) sorted by relevance
337 if (stream->state != I2S_STATE_READY) { in i2s_esp32_rx_callback()355 stream->state = I2S_STATE_READY; in i2s_esp32_rx_callback()396 if (stream->state != I2S_STATE_READY) { in i2s_esp32_tx_callback()407 stream->state = I2S_STATE_READY; in i2s_esp32_tx_callback()411 stream->state = I2S_STATE_READY; in i2s_esp32_tx_callback()418 stream->state = I2S_STATE_READY; in i2s_esp32_tx_callback()530 if (stream->state != I2S_STATE_NOT_READY && stream->state != I2S_STATE_READY) { in i2s_esp32_configure()678 stream->state = I2S_STATE_READY; in i2s_esp32_configure()726 if (stream->state != I2S_STATE_READY) { in i2s_esp32_trigger()762 stream->state = I2S_STATE_READY; in i2s_esp32_trigger()[all …]
346 stream->state != I2S_STATE_READY) { in i2s_litex_configure()425 stream->state = I2S_STATE_READY; in i2s_litex_configure()457 dev_data->tx.state != I2S_STATE_READY) { in i2s_litex_write()473 if (dev_data->tx.state == I2S_STATE_READY) { in i2s_litex_write()500 if (stream->state != I2S_STATE_READY) { in i2s_litex_trigger()514 stream->state != I2S_STATE_READY) { in i2s_litex_trigger()520 stream->state = I2S_STATE_READY; in i2s_litex_trigger()583 stream->state = I2S_STATE_READY; in i2s_litex_isr_tx()
215 stream->state != I2S_STATE_READY) { in i2s_stm32_configure()312 stream->state = I2S_STATE_READY; in i2s_stm32_configure()338 if (stream->state != I2S_STATE_READY) { in i2s_stm32_trigger()373 stream->state = I2S_STATE_READY; in i2s_stm32_trigger()398 stream->state = I2S_STATE_READY; in i2s_stm32_trigger()416 stream->state = I2S_STATE_READY; in i2s_stm32_trigger()424 stream->state = I2S_STATE_READY; in i2s_stm32_trigger()471 dev_data->tx.state != I2S_STATE_READY) { in i2s_stm32_write()617 stream->state = I2S_STATE_READY; in dma_rx_callback()664 stream->state = I2S_STATE_READY; in dma_tx_callback()[all …]
265 drv_data->state = I2S_STATE_READY; in data_handler()425 if (drv_data->state != I2S_STATE_READY) { in i2s_nrfx_configure()617 drv_data->state != I2S_STATE_READY) { in i2s_nrfx_write()732 if (drv_data->state == I2S_STATE_READY) { in clock_started_callback()774 drv_data->state = I2S_STATE_READY; in trigger_start()825 cmd_allowed = (drv_data->state == I2S_STATE_READY); in i2s_nrfx_trigger()878 if (drv_data->state != I2S_STATE_READY) { in i2s_nrfx_trigger()883 drv_data->state = I2S_STATE_READY; in i2s_nrfx_trigger()888 drv_data->state = I2S_STATE_READY; in i2s_nrfx_trigger()952 .state = I2S_STATE_READY, \
210 stream->state != I2S_STATE_READY) { in i2s_mcux_configure()310 stream->state = I2S_STATE_READY; in i2s_mcux_configure()488 stream->state = I2S_STATE_READY; in i2s_mcux_dma_tx_callback()517 stream->state = I2S_STATE_READY; in i2s_mcux_dma_tx_callback()588 stream->state = I2S_STATE_READY; in i2s_mcux_dma_rx_callback()718 if (stream->state != I2S_STATE_READY) { in i2s_mcux_trigger()765 stream->state = I2S_STATE_READY; in i2s_mcux_trigger()779 stream->state = I2S_STATE_READY; in i2s_mcux_trigger()838 stream->state != I2S_STATE_READY) { in i2s_mcux_write()
235 stream->state = I2S_STATE_READY; in dma_rx_callback()291 stream->state = I2S_STATE_READY; in dma_tx_callback()300 stream->state = I2S_STATE_READY; in dma_tx_callback()573 stream->state != I2S_STATE_READY) { in i2s_sam_configure()629 stream->state = I2S_STATE_READY; in i2s_sam_configure()807 if (stream->state != I2S_STATE_READY) { in i2s_sam_trigger()854 stream->state = I2S_STATE_READY; in i2s_sam_trigger()862 stream->state = I2S_STATE_READY; in i2s_sam_trigger()909 dev_data->tx.state != I2S_STATE_READY) { in i2s_sam_write()
283 strm->state = I2S_STATE_READY; in i2s_dma_tx_callback()310 strm->state = I2S_STATE_READY; in i2s_dma_tx_callback()396 strm->state = I2S_STATE_READY; in i2s_dma_rx_callback()449 (dev_data->tx.state != I2S_STATE_READY) && in i2s_mcux_config()451 (dev_data->rx.state != I2S_STATE_READY)) { in i2s_mcux_config()656 dev_data->tx.state = I2S_STATE_READY; in i2s_mcux_config()679 dev_data->rx.state = I2S_STATE_READY; in i2s_mcux_config()885 if (strm->state != I2S_STATE_READY) { in i2s_mcux_trigger()914 strm->state = I2S_STATE_READY; in i2s_mcux_trigger()949 strm->state = I2S_STATE_READY; in i2s_mcux_trigger()[all …]
228 I2S_STATE_READY, enumerator
