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Searched refs:DT_NUM_IRQS (Results 1 – 25 of 29) sorted by relevance

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/Zephyr-latest/drivers/mbox/
Dmbox_nrf_vevif_task_rx.c22 BUILD_ASSERT(VEVIF_TASKS_NUM == DT_NUM_IRQS(DT_DRV_INST(0)), "# IRQs != # tasks");
37 LISTIFY(DT_NUM_IRQS(DT_DRV_INST(0)), VEVIF_IRQN, (,))
127 LISTIFY(DT_NUM_IRQS(DT_DRV_INST(0)), VEVIF_IRQ_FUN, ())
138 LISTIFY(DT_NUM_IRQS(DT_DRV_INST(0)), VEVIF_IRQ_CONNECT, (;)); in vevif_task_rx_init()
Dmbox_nrf_bellboard_rx.c17 BUILD_ASSERT(DT_NUM_IRQS(DT_DRV_INST(0)) <= BELLBOARD_NUM_IRQS, "# interrupt exceeds maximum");
31 LISTIFY(DT_NUM_IRQS(DT_DRV_INST(0)), BELLBOARD_GET_EVT_MAPPING, ())};
/Zephyr-latest/drivers/serial/
Duart_cmsdk_apb.c511 #if DT_NUM_IRQS(DT_DRV_INST(0)) == 1
576 #if DT_NUM_IRQS(DT_DRV_INST(1)) == 1
641 #if DT_NUM_IRQS(DT_DRV_INST(2)) == 1
706 #if DT_NUM_IRQS(DT_DRV_INST(3)) == 1
771 #if DT_NUM_IRQS(DT_DRV_INST(4)) == 1
/Zephyr-latest/drivers/interrupt_controller/
Dintc_eirq_nxp_s32.c223 LISTIFY(DT_NUM_IRQS(DT_DRV_INST(n)), _EIRQ_NXP_S32_IRQ_CONFIG, (), n)
232 LISTIFY(DT_NUM_IRQS(DT_DRV_INST(n)), EIRQ_NXP_S32_ISR_DEFINE, (), n) \
/Zephyr-latest/drivers/dma/
Ddma_stm32u5.c763 == DT_NUM_IRQS(DT_DRV_INST(index)), \
773 DT_NUM_IRQS(DT_DRV_INST(index)))]; \
781 DT_NUM_IRQS(DT_DRV_INST(index)) \
Ddma_nxp_edma.c743 DT_NUM_IRQS(DT_INST(inst, DT_DRV_COMPAT)) || \
745 DT_NUM_IRQS(DT_INST(inst, DT_DRV_COMPAT)), \
Ddma_max32.c340 CONFIGURE_ALL_IRQS(inst, DT_NUM_IRQS(DT_DRV_INST(inst))); \
Ddma_si32.c123 LISTIFY(DT_NUM_IRQS(DT_DRV_INST(0)), DMA_SI32_IRQ_CONNECT_GEN, (;)); in dma_si32_init()
Ddma_stm32_bdma.c913 LISTIFY(DT_NUM_IRQS(DT_DRV_INST(0)), BDMA_STM32_DEFINE_IRQ_HANDLER_GEN, (;));
921 LISTIFY(DT_NUM_IRQS(DT_DRV_INST(0)), BDMA_STM32_IRQ_CONNECT_GEN, (;)); in bdma_stm32_config_irq_0()
Ddma_nxp_edma.h51 LISTIFY(DT_NUM_IRQS(DT_INST(inst, DT_DRV_COMPAT)), IDENTITY_VARGS, (,))
Ddma_rpi_pico.c358 CONFIGURE_ALL_IRQS(inst, DT_NUM_IRQS(DT_DRV_INST(inst))); \
Ddma_silabs_ldma.c500 CONFIGURE_ALL_IRQS(inst, DT_NUM_IRQS(DT_DRV_INST(inst))); \
Ddma_mcux_edma.c850 #define NUM_IRQS_WITHOUT_ERROR_IRQ(n) UTIL_DEC(DT_NUM_IRQS(DT_DRV_INST(n)))
852 #define NUM_IRQS_WITHOUT_ERROR_IRQ(n) DT_NUM_IRQS(DT_DRV_INST(n))
Ddma_dw_axi.c909 LISTIFY(DT_NUM_IRQS(DT_DRV_INST(inst)), CONFIGURE_DMA_IRQ, (), inst) \
Ddma_gd32.c674 CONFIGURE_ALL_IRQS(inst, DT_NUM_IRQS(DT_DRV_INST(inst))); \
/Zephyr-latest/drivers/gpio/
Dgpio_nxp_s32.c524 LISTIFY(DT_NUM_IRQS(DT_DRV_INST(n)), \
529 .map_cnt = DT_NUM_IRQS(DT_DRV_INST(n)), \
Dgpio_renesas_rz.c446 LISTIFY(DT_NUM_IRQS(node_id), \
452 GPIO_RZ_TINT_ISR_INIT(node_id, DT_NUM_IRQS(node_id)) \
Dgpio_altera_pio.c325 LISTIFY(DT_NUM_IRQS(DT_DRV_INST(n)), GPIO_CFG_IRQ, (), n)\
Dgpio_dw.c451 LISTIFY(DT_NUM_IRQS(DT_DRV_INST(n)), GPIO_CFG_IRQ, (), n) \
Dgpio_b91.c40 #define IS_INST_IRQ_EN(inst) (DT_NUM_IRQS(DT_DRV_INST(inst)) == 1)
Dgpio_lpc11u6x.c507 .nirqs = DT_NUM_IRQS(DT_DRV_INST(0)),
/Zephyr-latest/drivers/counter/
Dcounter_rpi_pico_timer.c221 ch_data##inst[DT_NUM_IRQS(DT_DRV_INST(inst))]; \
/Zephyr-latest/drivers/spi/
Dspi_dw.c621 COND_CODE_1(IS_EQ(DT_NUM_IRQS(DT_DRV_INST(inst)), 1), \
627 (COND_CODE_1(IS_EQ(DT_NUM_IRQS(DT_DRV_INST(inst)), 3), \
/Zephyr-latest/drivers/pwm/
Dpwm_mcux_ftm.c508 #if IS_EQ(DT_NUM_IRQS(DT_DRV_INST(0)), 1)
/Zephyr-latest/include/zephyr/
Ddevicetree.h2550 #define DT_NUM_IRQS(node_id) DT_CAT(node_id, _IRQ_NUM) macro
4537 #define DT_INST_NUM_IRQS(inst) DT_NUM_IRQS(DT_DRV_INST(inst))

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