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Searched refs:CLKMGR_PERPLL_PLLC0 (Results 1 – 2 of 2) sorted by relevance

/Zephyr-latest/include/zephyr/drivers/clock_control/
Dclock_agilex_ll.h48 #define CLKMGR_PERPLL_PLLC0 0x30 macro
/Zephyr-latest/drivers/clock_control/
Dclock_agilex_ll.c101 CLKMGR_PERPLL_PLLC0); in get_mpu_clk()