Searched refs:rsr (Results 1 – 8 of 8) sorted by relevance
/Zephyr-Core-3.7.0/arch/xtensa/core/ |
D | xtensa_asm2_util.S | 45 rsr a2, WINDOWSTART 48 rsr a3, WINDOWBASE 251 rsr a0, PS 267 rsr a0, ZSR_FLUSH 287 rsr a6, ZSR_CPU 399 rsr.exccause a0 409 rsr.exccause a0 415 rsr a0, ZSR_A0SAVE 432 rsr.ptevaddr a0 434 rsr a0, ZSR_A0SAVE [all …]
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D | userspace.S | 30 rsr.epc1 a2 37 rsr.ps a2 49 rsr a0, ZSR_A0SAVE 54 rsr a2, ZSR_SYSCALL_SCRATCH 56 rsr a0, ZSR_CPU 65 rsr a2, ZSR_A0SAVE 67 rsr.ps a2 71 rsr.epc1 a2 81 rsr.ps a3 91 rsr a0, ZSR_CPU [all …]
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D | window_vectors.S | 100 rsr a0, WINDOWBASE /* grab WINDOWBASE before rotw changes it */ 102 rsr a2, PS 105 rsr a4, ZSR_A0SAVE /* restore original a0 (now in a4) */
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/Zephyr-Core-3.7.0/arch/xtensa/include/ |
D | xtensa_asm2_s.h | 167 rsr.sar a0 170 rsr.lbeg a0 172 rsr.lend a0 174 rsr.lcount a0 177 rsr.exccause a0 180 rsr.scompare1 a0 378 rsr.ZSR_EPS a2 445 rsr.ps a0 449 rsr.ps a0 481 rsr.ZSR_CPU a3 [all …]
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/Zephyr-Core-3.7.0/drivers/serial/ |
D | uart_pl011.c | 156 return get_uart(dev)->rsr & PL011_RSR_ERROR_MASK; in pl011_poll_in() 175 if (get_uart(dev)->rsr & PL011_RSR_ECR_OE) { in pl011_err_check() 179 if (get_uart(dev)->rsr & PL011_RSR_ECR_BE) { in pl011_err_check() 183 if (get_uart(dev)->rsr & PL011_RSR_ECR_PE) { in pl011_err_check() 187 if (get_uart(dev)->rsr & PL011_RSR_ECR_FE) { in pl011_err_check()
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D | uart_pl011_registers.h | 20 uint32_t rsr; member
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/Zephyr-Core-3.7.0/soc/intel/intel_adsp/ace/ |
D | asm_memory_management.h | 35 rsr.sar \aw /* store old sar value */
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/Zephyr-Core-3.7.0/arch/xtensa/core/startup/ |
D | reset_vector.S | 202 rsr a2, ICOUNTLEVEL 273 rsr.prid a3 /* core and multiprocessor ID */ 459 rsr a2, MEMCTL
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