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Searched refs:intc (Results 1 – 25 of 83) sorted by relevance

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/Zephyr-Core-3.7.0/arch/common/
Dmultilevel_irq.c37 STRUCT_SECTION_FOREACH_ALTERNATE(intc_table, _irq_parent_entry, intc) { in get_intc_entry_for_irq()
38 if ((intc->level == level) && (intc->irq == intc_irq)) { in get_intc_entry_for_irq()
39 return intc; in get_intc_entry_for_irq()
48 const struct _irq_parent_entry *intc = get_intc_entry_for_irq(irq); in z_get_sw_isr_device_from_irq() local
50 __ASSERT(intc != NULL, "can't find an aggregator to handle irq(%X)", irq); in z_get_sw_isr_device_from_irq()
52 return intc != NULL ? intc->dev : NULL; in z_get_sw_isr_device_from_irq()
58 STRUCT_SECTION_FOREACH_ALTERNATE(intc_table, _irq_parent_entry, intc) { in z_get_sw_isr_irq_from_device()
59 if (intc->dev == dev) { in z_get_sw_isr_irq_from_device()
60 return intc->irq; in z_get_sw_isr_irq_from_device()
72 const struct _irq_parent_entry *intc = get_intc_entry_for_irq(irq); in z_get_sw_isr_table_idx() local
[all …]
/Zephyr-Core-3.7.0/dts/riscv/
Dneorv32.dtsi27 intc: interrupt-controller { label
28 compatible = "riscv,cpu-intc";
37 0 0 &intc 0 16
38 0 1 &intc 0 17
39 0 2 &intc 0 18
40 0 3 &intc 0 19
41 0 4 &intc 0 20
42 0 5 &intc 0 21
43 0 6 &intc 0 22
44 0 7 &intc 0 23
[all …]
/Zephyr-Core-3.7.0/dts/x86/intel/
Dgpio_common.dtsi15 interrupt-parent = <&intc>;
24 interrupt-parent = <&intc>;
33 interrupt-parent = <&intc>;
42 interrupt-parent = <&intc>;
51 interrupt-parent = <&intc>;
60 interrupt-parent = <&intc>;
69 interrupt-parent = <&intc>;
78 interrupt-parent = <&intc>;
87 interrupt-parent = <&intc>;
96 interrupt-parent = <&intc>;
[all …]
Delkhart_lake.dtsi36 intc: ioapic@fec00000 { label
77 interrupt-parent = <&intc>;
91 interrupt-parent = <&intc>;
106 interrupt-parent = <&intc>;
121 interrupt-parent = <&intc>;
136 interrupt-parent = <&intc>;
151 interrupt-parent = <&intc>;
166 interrupt-parent = <&intc>;
181 interrupt-parent = <&intc>;
196 interrupt-parent = <&intc>;
[all …]
Draptor_lake_p.dtsi30 intc: ioapic@fec00000 { label
59 interrupt-parent = <&intc>;
71 interrupt-parent = <&intc>;
84 interrupt-parent = <&intc>;
102 interrupt-parent = <&intc>;
119 interrupt-parent = <&intc>;
136 interrupt-parent = <&intc>;
149 interrupt-parent = <&intc>;
162 interrupt-parent = <&intc>;
175 interrupt-parent = <&intc>;
[all …]
Draptor_lake_s.dtsi31 intc: ioapic@fec00000 { label
61 interrupt-parent = <&intc>;
80 interrupt-parent = <&intc>;
100 interrupt-parent = <&intc>;
122 interrupt-parent = <&intc>;
142 interrupt-parent = <&intc>;
162 interrupt-parent = <&intc>;
182 interrupt-parent = <&intc>;
202 interrupt-parent = <&intc>;
222 interrupt-parent = <&intc>;
[all …]
Dintel_ish5.dtsi48 intc: ioapic@fec00000 { label
86 interrupt-parent = <&intc>;
95 interrupt-parent = <&intc>;
104 interrupt-parent = <&intc>;
117 interrupt-parent = <&intc>;
129 interrupt-parent = <&intc>;
141 interrupt-parent = <&intc>;
153 interrupt-parent = <&intc>;
166 interrupt-parent = <&intc>;
178 interrupt-parent = <&intc>;
[all …]
Dapollo_lake.dtsi31 intc: ioapic@fec00000 { label
63 interrupt-parent = <&intc>;
77 interrupt-parent = <&intc>;
92 interrupt-parent = <&intc>;
107 interrupt-parent = <&intc>;
121 interrupt-parent = <&intc>;
134 interrupt-parent = <&intc>;
147 interrupt-parent = <&intc>;
160 interrupt-parent = <&intc>;
173 interrupt-parent = <&intc>;
[all …]
Datom.dtsi24 intc: ioapic@fec00000 { label
57 interrupt-parent = <&intc>;
68 interrupt-parent = <&intc>;
77 interrupt-parent = <&intc>;
86 interrupt-parent = <&intc>;
Dalder_lake.dtsi33 intc: ioapic@fec00000 { label
149 interrupt-parent = <&intc>;
165 interrupt-parent = <&intc>;
183 interrupt-parent = <&intc>;
203 interrupt-parent = <&intc>;
218 interrupt-parent = <&intc>;
231 interrupt-parent = <&intc>;
244 interrupt-parent = <&intc>;
257 interrupt-parent = <&intc>;
270 interrupt-parent = <&intc>;
[all …]
/Zephyr-Core-3.7.0/dts/arc/synopsys/
Demsk.dtsi25 intc: arcv2-intc { label
26 compatible = "snps,arcv2-intc";
34 interrupt-parent = <&intc>;
40 interrupt-parent = <&intc>;
67 interrupt-parent = <&intc>;
76 interrupt-parent = <&intc>;
83 interrupt-parent = <&intc>;
91 interrupt-parent = <&intc>;
99 interrupt-parent = <&intc>;
107 interrupt-parent = <&intc>;
[all …]
Darc_iot.dtsi24 intc: arcv2-intc { label
25 compatible = "snps,arcv2-intc";
33 interrupt-parent = <&intc>;
81 interrupt-parent = <&intc>;
92 interrupt-parent = <&intc>;
103 interrupt-parent = <&intc>;
114 interrupt-parent = <&intc>;
122 interrupt-parent = <&intc>;
133 interrupt-parent = <&intc>;
144 interrupt-parent = <&intc>;
[all …]
Demsdp.dtsi26 intc: arcv2-intc { label
27 compatible = "snps,arcv2-intc";
35 interrupt-parent = <&intc>;
71 interrupt-parent = <&intc>;
79 interrupt-parent = <&intc>;
99 interrupt-parent = <&intc>;
117 interrupt-parent = <&intc>;
139 interrupt-parent = <&intc>;
154 interrupt-parent = <&intc>;
Darc_hs4xd.dtsi43 intc: arcv2-intc { label
44 compatible = "snps,arcv2-intc";
51 compatible = "snps,archs-idu-intc";
54 interrupt-parent = <&intc>;
60 interrupt-parent = <&intc>;
66 interrupt-parent = <&intc>;
72 interrupt-parent = <&intc>;
Darc_hsdk.dtsi43 intc: arcv2-intc { label
44 compatible = "snps,arcv2-intc";
51 compatible = "snps,archs-idu-intc";
54 interrupt-parent = <&intc>;
60 interrupt-parent = <&intc>;
66 interrupt-parent = <&intc>;
72 interrupt-parent = <&intc>;
/Zephyr-Core-3.7.0/boards/snps/nsim/arc_classic/
Dnsim.dtsi18 intc: arcv2-intc { label
19 compatible = "snps,arcv2-intc";
27 interrupt-parent = <&intc>;
33 interrupt-parent = <&intc>;
/Zephyr-Core-3.7.0/boards/qemu/arc/
Dqemu_arc.dtsi21 intc: arcv2-intc { label
22 compatible = "snps,arcv2-intc";
30 interrupt-parent = <&intc>;
36 interrupt-parent = <&intc>;
55 interrupt-parent = <&intc>;
65 interrupt-parent = <&intc>;
/Zephyr-Core-3.7.0/dts/xtensa/espressif/esp32/
Desp32_common.dtsi78 interrupt-parent = <&intc>;
112 intc: interrupt-controller@3ff00104 { label
114 compatible = "espressif,esp32-intc";
135 interrupt-parent = <&intc>;
170 interrupt-parent = <&intc>;
177 interrupt-parent = <&intc>;
184 interrupt-parent = <&intc>;
191 interrupt-parent = <&intc>;
200 interrupt-parent = <&intc>;
209 interrupt-parent = <&intc>;
[all …]
/Zephyr-Core-3.7.0/dts/xtensa/espressif/esp32s3/
Desp32s3_common.dtsi104 intc: interrupt-controller@600c2000 { label
106 compatible = "espressif,esp32-intc";
126 interrupt-parent = <&intc>;
135 interrupt-parent = <&intc>;
171 interrupt-parent = <&intc>;
178 interrupt-parent = <&intc>;
187 interrupt-parent = <&intc>;
196 interrupt-parent = <&intc>;
220 interrupt-parent = <&intc>;
235 interrupt-parent = <&intc>;
[all …]
/Zephyr-Core-3.7.0/dts/xtensa/espressif/esp32s2/
Desp32s2_common.dtsi87 intc: interrupt-controller@3f4c2000 { label
89 compatible = "espressif,esp32-intc";
109 interrupt-parent = <&intc>;
118 interrupt-parent = <&intc>;
150 interrupt-parent = <&intc>;
159 interrupt-parent = <&intc>;
168 interrupt-parent = <&intc>;
188 interrupt-parent = <&intc>;
203 interrupt-parent = <&intc>;
211 interrupt-parent = <&intc>;
[all …]
/Zephyr-Core-3.7.0/dts/riscv/espressif/esp32c6/
Desp32c6_common.dtsi52 intc: interrupt-controller@60010000 { label
53 compatible = "espressif,esp32-intc";
65 interrupt-parent = <&intc>;
84 interrupt-parent = <&intc>;
92 interrupt-parent = <&intc>;
103 interrupt-parent = <&intc>;
112 interrupt-parent = <&intc>;
138 interrupt-parent = <&intc>;
151 interrupt-parent = <&intc>;
160 interrupt-parent = <&intc>;
[all …]
/Zephyr-Core-3.7.0/dts/riscv/espressif/esp32c3/
Desp32c3_common.dtsi88 intc: interrupt-controller@600c2000 { label
89 compatible = "espressif,esp32-intc";
101 interrupt-parent = <&intc>;
119 interrupt-parent = <&intc>;
128 interrupt-parent = <&intc>;
153 interrupt-parent = <&intc>;
168 interrupt-parent = <&intc>;
178 interrupt-parent = <&intc>;
187 interrupt-parent = <&intc>;
206 interrupt-parent = <&intc>;
[all …]
/Zephyr-Core-3.7.0/tests/drivers/gpio/gpio_ite_it8xxx2_v2/boards/
Dnative_sim.overlay8 #include <zephyr/dt-bindings/interrupt-controller/ite-intc.h>
12 intc: interrupt-controller@f03f00 {
13 compatible = "vnd,intc";
37 interrupt-parent = <&intc>;
/Zephyr-Core-3.7.0/dts/riscv/qemu/
Dvirt-riscv.dtsi47 compatible = "riscv,cpu-intc";
61 compatible = "riscv,cpu-intc";
75 compatible = "riscv,cpu-intc";
89 compatible = "riscv,cpu-intc";
103 compatible = "riscv,cpu-intc";
117 compatible = "riscv,cpu-intc";
131 compatible = "riscv,cpu-intc";
145 compatible = "riscv,cpu-intc";
/Zephyr-Core-3.7.0/dts/riscv/niosv/
Dniosv-m.dtsi26 intc: interrupt-controller { label
27 compatible = "riscv,cpu-intc";
39 interrupt-parent = <&intc>;

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