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/Zephyr-Core-3.7.0/scripts/west_commands/zspdx/
Dgetincludes.py21 fragments = [fr for fr in tcg.compileCommandFragments if fr.strip() != ""]
/Zephyr-Core-3.7.0/boards/shields/seeed_xiao_round_display/
DKconfig.shield1 # Copyright (c) 2024 Nicolas Goualard <nicolas.goualard@sfr.fr>
DKconfig.defconfig1 # Copyright (c) 2024 Nicolas Goualard <nicolas.goualard@sfr.fr>
Dseeed_xiao_round_display.overlay2 * Copyright (c) 2024, Nicolas Goualard <nicolas.goualard@sfr.fr>
/Zephyr-Core-3.7.0/boards/rak/rak4631/
DKconfig.rak46313 # Copyright (c) 2021 Guillaume Paquet <guillaume.paquet@smile.fr>
DKconfig.defconfig3 # Copyright (c) 2021 Guillaume Paquet <guillaume.paquet@smile.fr>
Dboard.cmake1 # Copyright (c) 2021 Guillaume Paquet <guillaume.paquet@smile.fr>
/Zephyr-Core-3.7.0/boards/rak/rak5010/
DKconfig.rak50103 # Copyright (c) 2020 Guillaume Paquet <guillaume.paquet@smile.fr>
DKconfig.defconfig3 # Copyright (c) 2020 Guillaume Paquet <guillaume.paquet@smile.fr>
Dboard.cmake1 # Copyright (c) 2020 Guillaume Paquet <guillaume.paquet@smile.fr>
Drak5010_nrf52840.dts2 * Copyright (c) 2020 Guillaume Paquet <guillaume.paquet@smile.fr>
/Zephyr-Core-3.7.0/drivers/serial/
Duart_stellaris.c42 uint32_t fr; member
182 while (config->uart->fr & UARTFR_BUSY) { in disable()
253 return (config->uart->fr & UARTFR_TXFE); in poll_tx_ready()
269 if (config->uart->fr & UARTFR_RXFE) { in uart_stellaris_poll_in()
318 while ((len - num_tx > 0) && ((config->uart->fr & UARTFR_TXFF) == 0U)) { in uart_stellaris_fifo_fill()
341 while ((size - num_rx > 0) && ((config->uart->fr & UARTFR_RXFE) == 0U)) { in uart_stellaris_fifo_read()
386 while (config->uart->fr & UARTFR_BUSY) { in uart_stellaris_irq_tx_enable()
Duart_pl011.c144 return (get_uart(dev)->fr & PL011_FR_RXFE) == 0U; in pl011_is_readable()
163 while (get_uart(dev)->fr & PL011_FR_TXFF) { in pl011_poll_out()
312 while (!(get_uart(dev)->fr & PL011_FR_TXFF) && (len - num_tx > 0)) { in pl011_fifo_fill()
323 while ((len - num_rx > 0) && !(get_uart(dev)->fr & PL011_FR_RXFE)) { in pl011_fifo_read()
364 return ((get_uart(dev)->fr & PL011_FR_BUSY) == 0); in pl011_irq_tx_complete()
376 (get_uart(dev)->ris & PL011_RIS_TXRIS || get_uart(dev)->fr & PL011_FR_TXFE)); in pl011_irq_tx_ready()
397 (!(get_uart(dev)->fr & PL011_FR_RXFE))); in pl011_irq_rx_ready()
Duart_pl011_registers.h24 uint32_t fr; /* flags register */ member
/Zephyr-Core-3.7.0/drivers/input/
DKconfig.chsc6x1 # Copyright (c) 2024 Nicolas Goualard <nicolas.goualard@sfr.fr>
/Zephyr-Core-3.7.0/tests/drivers/adc/adc_api/boards/
Dnucleo_h533re.overlay4 * Copyright (c) Alex Fabre <alex.fabre@rtone.fr>
/Zephyr-Core-3.7.0/scripts/coccinelle/
Dunsigned_lesser_than_zero.cocci7 // URL: http://coccinelle.lip6.fr/
Dsemicolon.cocci6 // URL: http://coccinelle.lip6.fr/
Dnoderef.cocci7 // URL: http://coccinelle.lip6.fr/
Dreturnvar.cocci6 // URL: http://coccinelle.lip6.fr/
Dmini_lock.cocci12 // URL: http://coccinelle.lip6.fr/
/Zephyr-Core-3.7.0/scripts/west_commands/
Drun_common.py277 if re.match(fr'^{match}$', check) is not None:
339 if re.match(fr'^{match}$', board) is not None:
354 if re.match(fr'^{check}$', match) is not None:
385 if re.match(fr'^{match}$', board) is not None:
403 if re.match(fr'^{check}$', match) is not None:
/Zephyr-Core-3.7.0/scripts/
Dlist_hardware.py101 if re.match(fr'^{soc_name}$', soc.name) is not None:
105 … if re.match(fr'^{check_string}$', cpucluster) is not None:
/Zephyr-Core-3.7.0/doc/develop/tools/
Dcoccinelle.rst5 Copyright 2010 Julia Lawall <julia.lawall@lip6.fr>
6 Copyright 2010 Gilles Muller <Gilles.Muller@lip6.fr>
41 http://coccinelle.lip6.fr/
71 https://coccinelle.gitlabpages.inria.fr/website/documentation.html
587 * https://systeme.lip6.fr/mailman/listinfo/cocci
592 * https://systeme.lip6.fr/pipermail/cocci/
/Zephyr-Core-3.7.0/lib/os/
Dcbprintf_complete.c747 static char _get_digit(uint64_t *fr, int *digit_count) in _get_digit() argument
753 *fr *= 10U; in _get_digit()
754 rval = ((*fr >> 60) & 0xF) + '0'; in _get_digit()
755 *fr &= (BIT64(60) - 1U); in _get_digit()

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