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Searched refs:arefclkdiv (Results 1 – 2 of 2) sorted by relevance

/Zephyr-latest/drivers/clock_control/
Dclock_agilex_ll.c27 uint32_t arefclkdiv, ref_clk; in get_ref_clk() local
47 arefclkdiv = CLKMGR_PLLGLOB_AREFCLKDIV(pllglob); in get_ref_clk()
48 ref_clk /= arefclkdiv; in get_ref_clk()
Dclock_control_agilex5_ll.c20 uint32_t arefclkdiv = 0U; in get_ref_clk() local
55 arefclkdiv = CLKCTRL_PLLGLOB_AREFCLKDIV(pllglob_val); in get_ref_clk()
56 __ASSERT(arefclkdiv != 0, "Reference clock divider is zero"); in get_ref_clk()
57 ref_clk /= arefclkdiv; in get_ref_clk()