| /Zephyr-Core-3.7.0/samples/boards/intel_adsp/code_relocation/ |
| D | linker_xtensa_intel_adsp_cavs.ld | 13 /* Use SRAM2 for TEXT, SRAM3 for DATA and SRAM4 for BSS.
20 * | | BSS | TEXT | DATA |
23 * Note that BSS, TEXT and DATA are contiguous, but that SRAM0 (default
25 * script would also place some BSS section on SRAM0, which would break
27 * default linker script, all BSS content is put in the SRAM4 region.
52 /* Place all of BSS content in SRAM4. If not done this way, platform default
54 * Note that an empty BSS section will still be generated during build, but
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| D | README.rst | 12 sections TEXT, DATA and BSS be contiguous, some work is done in the
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| /Zephyr-Core-3.7.0/include/zephyr/linker/ |
| D | sections.h | 109 #define BSS bss macro
122 #define BOOT_BSS BSS
136 #define PINNED_BSS BSS
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| /Zephyr-Core-3.7.0/cmake/linker_script/common/ |
| D | ram-end.cmake | 1 zephyr_linker_section(NAME .last_ram_section VMA RAM LMA RAM_REGION TYPE BSS)
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| /Zephyr-Core-3.7.0/scripts/build/ |
| D | gen_relocate_app.py | 66 BSS = "bss" variable in SectionKind
89 return cls.BSS
355 if region_is_default_ram(memory_type) and kind in (SectionKind.DATA, SectionKind.BSS):
403 …gen_string_sram_bss += string_create_helper(SectionKind.BSS, memory_type, full_list_of_sections, 0…
406 …gen_string += string_create_helper(SectionKind.BSS, memory_type, full_list_of_sections, 0, 1, phdr…
435 if (SectionKind.BSS in generate_sections
436 and full_list_of_sections[SectionKind.BSS]
441 memory_type.lower(), SectionKind.BSS.value)
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| /Zephyr-Core-3.7.0/arch/arc/core/ |
| D | cpu_idle.S | 25 SECTION_VAR(BSS, z_arc_cpu_sleep_mode)
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| /Zephyr-Core-3.7.0/include/zephyr/arch/sparc/ |
| D | linker.ld | 130 * For performance, BSS section is assumed to be 4 byte aligned and
141 * As memory is cleared in words only, it is simpler to ensure the BSS
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| /Zephyr-Core-3.7.0/include/zephyr/arch/mips/ |
| D | linker.ld | 154 * For performance, BSS section is assumed to be 4 byte aligned and
168 * As memory is cleared in words only, it is simpler to ensure the BSS
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| /Zephyr-Core-3.7.0/modules/hostap/ |
| D | Kconfig | 198 int "BSS max idle timeout in seconds"
202 BSS max idle timeout is the period for which AP may keep a client
204 client. Set 0 to disable inclusion of BSS max idle time tag in
206 timeout by including BSS max idle period in the association request.
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| /Zephyr-Core-3.7.0/soc/infineon/cat1b/cyw20829/ |
| D | linker.ld | 278 * For performance, BSS section is assumed to be 4 byte aligned and
295 * As memory is cleared in words only, it is simpler to ensure the BSS
347 * For performance, BSS section is assumed to be 4 byte aligned and
364 * As memory is cleared in words only, it is simpler to ensure the BSS
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| /Zephyr-Core-3.7.0/cmake/linker_script/arm/ |
| D | linker.cmake | 132 zephyr_linker_section(NAME .bss VMA RAM LMA FLASH TYPE BSS)
135 # As memory is cleared in words only, it is simpler to ensure the BSS
191 zephyr_linker_section(NAME .dtcm_bss GROUP DTCM_REGION SUBALIGN 4 TYPE BSS)
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| /Zephyr-Core-3.7.0/include/zephyr/arch/arm/cortex_m/scripts/ |
| D | linker.ld | 295 * For performance, BSS section is assumed to be 4 byte aligned and
312 * As memory is cleared in words only, it is simpler to ensure the BSS
364 * For performance, BSS section is assumed to be 4 byte aligned and
381 * As memory is cleared in words only, it is simpler to ensure the BSS
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| /Zephyr-Core-3.7.0/include/zephyr/arch/x86/intel64/ |
| D | linker.ld | 154 /* This should be put here before BSS section, otherwise the .bss.__gcov will
155 * be put in BSS section. That causes gcov not work properly */
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| /Zephyr-Core-3.7.0/samples/boards/stm32/ccm/ |
| D | README.rst | 59 Zero initialized BSS area : [0x10000000, 0x10000007)
105 Zero initialized BSS area : [0x10000000, 0x10000007)
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| /Zephyr-Core-3.7.0/include/zephyr/arch/x86/ia32/ |
| D | linker.ld | 492 * For performance, BSS section is forced to be both 4 byte aligned and
505 * As memory is cleared in words only, it is simpler to ensure the BSS
582 * to 3 extra bytes copied in next section (BSS). At run time, the XIP copy
583 * is done first followed by clearing the BSS section.
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| /Zephyr-Core-3.7.0/subsys/debug/coredump/ |
| D | Kconfig | 77 noinit, and BSS sections.
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| /Zephyr-Core-3.7.0/include/zephyr/arch/nios2/ |
| D | linker.ld | 256 * For performance, BSS section is assumed to be 4 byte aligned and
267 * As memory is cleared in words only, it is simpler to ensure the BSS
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| /Zephyr-Core-3.7.0/soc/nxp/imx/imx9/a55/ |
| D | linker.ld | 252 * For performance, BSS section is assumed to be 4 byte aligned and
265 * As memory is cleared in words only, it is simpler to ensure the BSS
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| /Zephyr-Core-3.7.0/include/zephyr/arch/arm/cortex_a_r/scripts/ |
| D | linker.ld | 288 * For performance, BSS section is assumed to be 4 byte aligned and
305 * As memory is cleared in words only, it is simpler to ensure the BSS
|
| /Zephyr-Core-3.7.0/soc/andestech/ae350/ |
| D | linker.ld | 241 * For performance, BSS section is assumed to be 4 byte aligned and
258 * As memory is cleared in words only, it is simpler to ensure the BSS
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| /Zephyr-Core-3.7.0/include/zephyr/arch/riscv/common/ |
| D | linker.ld | 270 * For performance, BSS section is assumed to be 4 byte aligned and
287 * As memory is cleared in words only, it is simpler to ensure the BSS
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| /Zephyr-Core-3.7.0/soc/ite/ec/it8xxx2/ |
| D | linker.ld | 363 * For performance, BSS section is assumed to be 4 byte aligned and
380 * As memory is cleared in words only, it is simpler to ensure the BSS
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| /Zephyr-Core-3.7.0/arch/x86/zefi/ |
| D | README.txt | 18 appropriate locations at startup, clear any zero-filled (BSS, etc...)
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| /Zephyr-Core-3.7.0/soc/openisa/rv32m1/ |
| D | linker.ld | 209 * For performance, BSS section is assumed to be 4 byte aligned and
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| /Zephyr-Core-3.7.0/cmake/linker/armlink/ |
| D | scatter_script.cmake | 72 if("${type}" STREQUAL BSS)
378 if("${type}" STREQUAL BSS)
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