Home
last modified time | relevance | path

Searched refs:IT8XXX2_SMB_BASE (Results 1 – 1 of 1) sorted by relevance

/Zephyr-Core-3.6.0/soc/riscv/ite_ec/common/
Dchip_chipregs.h1263 #define IT8XXX2_SMB_BASE 0x00F01C00 macro
1265 #define IT8XXX2_SMB_4P7USL ECREG(IT8XXX2_SMB_BASE + 0x00)
1266 #define IT8XXX2_SMB_4P0USL ECREG(IT8XXX2_SMB_BASE + 0x01)
1267 #define IT8XXX2_SMB_300NS ECREG(IT8XXX2_SMB_BASE + 0x02)
1268 #define IT8XXX2_SMB_250NS ECREG(IT8XXX2_SMB_BASE + 0x03)
1269 #define IT8XXX2_SMB_25MS ECREG(IT8XXX2_SMB_BASE + 0x04)
1270 #define IT8XXX2_SMB_45P3USL ECREG(IT8XXX2_SMB_BASE + 0x05)
1271 #define IT8XXX2_SMB_45P3USH ECREG(IT8XXX2_SMB_BASE + 0x06)
1272 #define IT8XXX2_SMB_4P7A4P0H ECREG(IT8XXX2_SMB_BASE + 0x07)
1273 #define IT8XXX2_SMB_SLVISELR ECREG(IT8XXX2_SMB_BASE + 0x08)
[all …]