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Searched refs:ipcc (Results 1 – 2 of 2) sorted by relevance

/Zephyr-Core-3.5.0/drivers/ipm/
Dipm_stm32_ipcc.c90 IPCC_TypeDef *ipcc; member
109 mask = (~IPCC_ReadReg(cfg->ipcc, MR)) & IPCC_ALL_MR_RXO_CH_MASK; in stm32_ipcc_mailbox_rx_isr()
110 mask &= IPCC_ReadOtherInstReg_SR(cfg->ipcc) & IPCC_ALL_SR_CH_MASK; in stm32_ipcc_mailbox_rx_isr()
118 IPCC_DisableReceiveChannel(cfg->ipcc, i); in stm32_ipcc_mailbox_rx_isr()
125 IPCC_ClearFlag_CHx(cfg->ipcc, i); in stm32_ipcc_mailbox_rx_isr()
126 IPCC_EnableReceiveChannel(cfg->ipcc, i); in stm32_ipcc_mailbox_rx_isr()
136 mask = (~IPCC_ReadReg(cfg->ipcc, MR)) & IPCC_ALL_MR_TXF_CH_MASK; in stm32_ipcc_mailbox_tx_isr()
139 mask &= ~IPCC_ReadReg_SR(cfg->ipcc) & IPCC_ALL_SR_CH_MASK; in stm32_ipcc_mailbox_tx_isr()
147 IPCC_DisableTransmitChannel(cfg->ipcc, i); in stm32_ipcc_mailbox_tx_isr()
174 if (IPCC_IsActiveFlag_CHx(cfg->ipcc, id)) { in stm32_ipcc_mailbox_ipm_send()
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/Zephyr-Core-3.5.0/dts/arm/st/mp1/
Dstm32mp157.dtsi384 compatible = "st,stm32-ipcc-mailbox";