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Searched refs:esp_intr_get_enabled_intmask (Results 1 – 3 of 3) sorted by relevance

/Zephyr-Core-3.5.0/soc/riscv/espressif_esp32/esp32c3/
Dsoc_irq.c43 res = esp_intr_get_enabled_intmask(0) & BIT(irq); in arch_irq_is_enabled()
45 res = esp_intr_get_enabled_intmask(1) & BIT(irq - 32); in arch_irq_is_enabled()
59 esp_intr_get_enabled_intmask(0); in soc_intr_get_next_source()
65 esp_intr_get_enabled_intmask(1); in soc_intr_get_next_source()
/Zephyr-Core-3.5.0/include/zephyr/drivers/interrupt_controller/
Dintc_esp32c3.h107 uint32_t esp_intr_get_enabled_intmask(int status_mask_number);
/Zephyr-Core-3.5.0/drivers/interrupt_controller/
Dintc_esp32c3.c177 uint32_t esp_intr_get_enabled_intmask(int status_mask_number) in esp_intr_get_enabled_intmask() function