Searched refs:SPI_CTRL (Results 1 – 5 of 5) sorted by relevance
| /Zephyr-Core-3.5.0/drivers/spi/ |
| D | spi_andes_atcspi200.c | 77 CLR_MASK(SPI_CTRL(dev), CTRL_TX_THRES_MSK); in spi_config()
78 CLR_MASK(SPI_CTRL(dev), CTRL_RX_THRES_MSK); in spi_config()
80 SET_MASK(SPI_CTRL(dev), TX_FIFO_THRESHOLD << CTRL_TX_THRES_OFFSET); in spi_config()
81 SET_MASK(SPI_CTRL(dev), RX_FIFO_THRESHOLD << CTRL_RX_THRES_OFFSET); in spi_config()
183 SET_MASK(SPI_CTRL(dev), CTRL_TX_FIFO_RST_MSK); in transfer_next_chunk()
184 SET_MASK(SPI_CTRL(dev), CTRL_RX_FIFO_RST_MSK); in transfer_next_chunk()
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| D | spi_andes_atcspi200.h | 36 #define SPI_CTRL(dev) (SPI_BASE + REG_CTRL) macro
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| /Zephyr-Core-3.5.0/soc/riscv/riscv-privileged/andes_v5/ae350/ |
| D | linker.ld | 48 #define SPI_CTRL DT_PARENT(DT_CHOSEN(zephyr_flash)) macro
49 #define ROM_BASE DT_REG_ADDR_BY_IDX(SPI_CTRL, 1)
50 #define ROM_SIZE DT_REG_SIZE_BY_IDX(SPI_CTRL, 1)
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| /Zephyr-Core-3.5.0/include/zephyr/arch/riscv/common/ |
| D | linker.ld | 47 #define SPI_CTRL DT_PARENT(DT_CHOSEN(zephyr_flash)) macro
48 #define ROM_BASE DT_REG_ADDR_BY_IDX(SPI_CTRL, 1)
49 #define ROM_SIZE DT_REG_SIZE_BY_IDX(SPI_CTRL, 1)
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| /Zephyr-Core-3.5.0/soc/riscv/riscv-ite/it8xxx2/ |
| D | linker.ld | 40 #define SPI_CTRL DT_PARENT(DT_CHOSEN(zephyr_flash)) macro
41 #define ROM_BASE DT_REG_ADDR_BY_IDX(SPI_CTRL, 1)
42 #define ROM_SIZE DT_REG_SIZE_BY_IDX(SPI_CTRL, 1)
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