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Searched refs:RCU_CFG1_TIMERSEL_MSK (Results 1 – 2 of 2) sorted by relevance

/Zephyr-Core-3.5.0/soc/arm/gigadevice/gd32f4xx/
Dgd32_regs.h29 #define RCU_CFG1_TIMERSEL_MSK (BIT_MASK(1) << RCU_CFG1_TIMERSEL_POS) macro
/Zephyr-Core-3.5.0/drivers/clock_control/
Dclock_control_gd32.c155 if ((cfg1 & RCU_CFG1_TIMERSEL_MSK) == 0U) { in clock_control_gd32_get_rate()