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Searched refs:RCU_CFG1_OFFSET (Results 1 – 3 of 3) sorted by relevance

/Zephyr-Core-3.5.0/soc/arm/gigadevice/gd32a50x/
Dgd32_regs.h16 #define RCU_CFG1_OFFSET 0x2CU macro
/Zephyr-Core-3.5.0/soc/arm/gigadevice/gd32f4xx/
Dgd32_regs.h18 #define RCU_CFG1_OFFSET 0x8CU macro
/Zephyr-Core-3.5.0/drivers/clock_control/
Dclock_control_gd32.c141 uint32_t cfg1 = sys_read32(config->base + RCU_CFG1_OFFSET); in clock_control_gd32_get_rate()