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/Zephyr-Core-3.5.0/soc/xtensa/intel_adsp/common/include/
Dintel_adsp_hda.h81 #define DGLLPI(base, regblock_size, stream) \ macro
113 *DGLLPI(base, regblock_size, sid), \
307 *DGLLPI(base, regblock_size, sid) = len; in intel_adsp_hda_host_commit()