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Searched refs:CTRL_REG_ENABLE_INTR (Results 1 – 1 of 1) sorted by relevance

/Zephyr-Core-3.5.0/drivers/serial/
Duart_xlnx_uartlite.c40 #define CTRL_REG_ENABLE_INTR BIT(4) macro
167 sys_write32(CTRL_REG_ENABLE_INTR, config->base + CTRL_REG_OFFSET); in xlnx_uartlite_irq_enable()