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Searched refs:CACHE_LINE_SIZE (Results 1 – 2 of 2) sorted by relevance

/Zephyr-Core-3.5.0/drivers/cache/
Dcache_aspeed.c42 #define CACHE_LINE_SIZE (1 << CACHE_LINE_SIZE_LOG2) macro
48 #define PREFETCH_BUF_SIZE CACHE_LINE_SIZE
100 tail = addr + size + (CACHE_LINE_SIZE - 1); in get_n_cacheline()
182 aligned_addr += CACHE_LINE_SIZE; in cache_data_invd_range()
243 aligned_addr += CACHE_LINE_SIZE; in cache_instr_invd_range()
316 return (ctrl & CACHE_ENABLE) ? CACHE_LINE_SIZE : 0; in cache_data_line_size_get()
328 return (ctrl & CACHE_ENABLE) ? CACHE_LINE_SIZE : 0; in cache_instr_line_size_get()
/Zephyr-Core-3.5.0/drivers/disk/nvme/
Dnvme_cmd.h304 #define CACHE_LINE_SIZE (64) macro
306 #define CACHE_LINE_SIZE CONFIG_DCACHE_LINE_SIZE macro
347 } __aligned(CACHE_LINE_SIZE);