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/Zephyr-Core-3.5.0/tests/cmake/zephyr_get/
Dsysbuild.cmake3 # Add a few copies of the same image, so that we can configure
7 set(image ${DEFAULT_IMAGE}_${suffix}) variable
8 if(NOT TARGET ${image})
10 APPLICATION ${image}
13 list(APPEND IMAGES ${image})
19 foreach(image ${IMAGES})
20 sysbuild_get(ASSERT_FAIL_COUNT IMAGE ${image} CACHE)
22 set(failures "${failures}\n - ${image}: ${ASSERT_FAIL_COUNT} assertion(s) failed")
28 message(FATAL_ERROR "Test failures per sysbuild image: ${failures}")
/Zephyr-Core-3.5.0/share/sysbuild/images/bootloader/
DCMakeLists.txt7 set(image mcuboot) variable
9 APPLICATION ${image}
15 sysbuild_add_dependencies(FLASH ${DEFAULT_IMAGE} ${image})
17 set_config_string(${image} CONFIG_BOOT_SIGNATURE_KEY_FILE "${SB_CONFIG_BOOT_SIGNATURE_KEY_FILE}")
18 set_config_bool(${image} CONFIG_BOOT_ENCRYPT_IMAGE "${SB_CONFIG_BOOT_ENCRYPTION}")
20 …set_config_string(${image} CONFIG_BOOT_ENCRYPTION_KEY_FILE "${SB_CONFIG_BOOT_ENCRYPTION_KEY_FILE}")
/Zephyr-Core-3.5.0/share/sysbuild/cmake/
Ddomains.cmake10 foreach(image ${IMAGES})
11 set(domains_yaml "${domains_yaml}\n - name: ${image}")
12 set(domains_yaml "${domains_yaml}\n build_dir: $<TARGET_PROPERTY:${image},_EP_BINARY_DIR>")
15 foreach(image ${IMAGES_FLASHING_ORDER})
16 set(flash_cond "$<NOT:$<BOOL:$<TARGET_PROPERTY:${image},BUILD_ONLY>>>")
17 set(domains_yaml "${domains_yaml}$<${flash_cond}:\n - ${image}>")
/Zephyr-Core-3.5.0/boards/arm/b_u585i_iot02a/
Db_u585i_iot02a_ns.dts47 /* Secure image primary slot */
49 label = "image-0";
52 /* Non-secure image primary slot */
54 label = "image-0-nonsecure";
57 /* Secure image primary slot */
59 label = "image-1";
62 /* Non-secure image primary slot */
64 label = "image-1-nonsecure";
/Zephyr-Core-3.5.0/subsys/mgmt/mcumgr/grp/img_mgmt/
DKconfig16 bool "Mcumgr handlers for image management"
24 Enables MCUmgr handlers for image management
31 bool "Use heap mem pool for flash image DFU context"
33 Use heap to allocate flash image upload context, otherwise a static variable will
34 be used. The context object is used by MCUMGR_GRP_IMG_MANAGER to buffer image writes
35 and has significant size, mainly affected by image write buffer of
59 bool "Verbose error responses when uploading application image"
66 bool "Allow to confirm secondary slot of non-active image"
69 Allows to confirm secondary (non-active) slot of non-active image.
71 image, via MCUmgr commands, to prevent confirming something that is
[all …]
/Zephyr-Core-3.5.0/boards/arm/nrf9160dk_nrf9160/
Dnrf9160dk_nrf9160_partition_conf.dtsi13 * Secure image will be placed, by default, in flash0
15 * Secure image will use sram0 for system memory.
17 * Non-Secure image will be placed in slot0_ns, and use
20 * Note that the Secure image only requires knowledge of
21 * the beginning of the Non-Secure image (not its size).
42 * - Lowest 88 kB SRAM allocated to Secure image (sram0_s).
45 * - Upper 128 kB allocated to Non-Secure image (sram0_ns).
47 * are allocated to the Non-Secure image.
/Zephyr-Core-3.5.0/boards/arm/nrf9161dk_nrf9161/
Dnrf9161dk_nrf9161_partition_conf.dtsi13 * Secure image will be placed, by default, in flash0
15 * Secure image will use sram0 for system memory.
17 * Non-Secure image will be placed in slot0_ns, and use
20 * Note that the Secure image only requires knowledge of
21 * the beginning of the Non-Secure image (not its size).
42 * - Lowest 88 kB SRAM allocated to Secure image (sram0_s).
45 * - Upper 128 kB allocated to Non-Secure image (sram0_ns).
47 * are allocated to the Non-Secure image.
/Zephyr-Core-3.5.0/doc/services/device_mgmt/smp_groups/
Dsmp_group_1.rst3 Application/software image management group
6 Application/software image management management group defines following commands:
33 The "slot" and "image" definition comes from mcuboot where "image" would
41 to single application, but will name them as "image-0" and "image-1" respectively.
51 | 1 | "slot0_partition" | "image-0" |
52 | | "slot1_partition" | "image-1" |
54 | 2 | "slot2_partition" | "image-2" |
55 | | "slot3_partition" | "image-3" |
97 Below definition of the response contains "image" field that has been marked
99 does not support more than one image. The field is mandatory when application
[all …]
/Zephyr-Core-3.5.0/samples/subsys/mgmt/mcumgr/smp_svr/
DREADME.rst153 Signing the sample image
159 To sign the sample image we built in a previous step:
165 The above command creates an image file called :file:`zephyr.signed.bin` in the
168 For more information on image signing and ``west sign``, see the :ref:`west-sign`
171 Flashing the sample image
174 Upload the :file:`zephyr.signed.bin` file from the previous to image slot-0 of your
177 To upload the initial image file to an empty slot-0, we simply use ``west flash``
179 the image.
185 We need to explicitly specify the *signed* image file, otherwise the non-signed version
186 will be used and the image won't be runnable.
[all …]
/Zephyr-Core-3.5.0/boards/arm/actinius_icarus/
Dactinius_icarus_partition_conf.dtsi13 * Secure image will be placed, by default, in flash0
15 * Secure image will use sram0 for system memory.
17 * Non-Secure image will be placed in slot0_ns, and use
20 * Note that the Secure image only requires knowledge of
21 * the beginning of the Non-Secure image (not its size).
42 * - Lowest 88 kB SRAM allocated to Secure image (sram0_s).
45 * - Upper 128 kB allocated to Non-Secure image (sram0_ns).
/Zephyr-Core-3.5.0/boards/arm/actinius_icarus_bee/
Dactinius_icarus_bee_partition_conf.dtsi13 * Secure image will be placed, by default, in flash0
15 * Secure image will use sram0 for system memory.
17 * Non-Secure image will be placed in slot0_ns, and use
20 * Note that the Secure image only requires knowledge of
21 * the beginning of the Non-Secure image (not its size).
42 * - Lowest 88 kB SRAM allocated to Secure image (sram0_s).
45 * - Upper 128 kB allocated to Non-Secure image (sram0_ns).
/Zephyr-Core-3.5.0/boards/arm/actinius_icarus_som/
Dactinius_icarus_som_partition_conf.dtsi13 * Secure image will be placed, by default, in flash0
15 * Secure image will use sram0 for system memory.
17 * Non-Secure image will be placed in slot0_ns, and use
20 * Note that the Secure image only requires knowledge of
21 * the beginning of the Non-Secure image (not its size).
42 * - Lowest 88 kB SRAM allocated to Secure image (sram0_s).
45 * - Upper 128 kB allocated to Non-Secure image (sram0_ns).
/Zephyr-Core-3.5.0/boards/arm/actinius_icarus_som_dk/
Dactinius_icarus_som_dk_partition_conf.dtsi13 * Secure image will be placed, by default, in flash0
15 * Secure image will use sram0 for system memory.
17 * Non-Secure image will be placed in slot0_ns, and use
20 * Note that the Secure image only requires knowledge of
21 * the beginning of the Non-Secure image (not its size).
42 * - Lowest 88 kB SRAM allocated to Secure image (sram0_s).
45 * - Upper 128 kB allocated to Non-Secure image (sram0_ns).
/Zephyr-Core-3.5.0/boards/arm/sparkfun_thing_plus_nrf9160/
Dsparkfun_thing_plus_nrf9160_partition_conf.dtsi14 * Secure image will be placed, by default, in flash0
16 * Secure image will use sram0 for system memory.
18 * Non-Secure image will be placed in slot0_ns, and use
21 * Note that the Secure image only requires knowledge of
22 * the beginning of the Non-Secure image (not its size).
43 * - Lowest 64 kB SRAM allocated to Secure image (sram0_s).
46 * - Upper 128 kB allocated to Non-Secure image (sram0_ns).
/Zephyr-Core-3.5.0/boards/arm/thingy53_nrf5340/
Dthingy53_nrf5340_partition_conf.dtsi13 * Secure image will be placed, by default, in flash0
15 * Secure image will use sram0 for system memory.
17 * Non-Secure image will be placed in slot0_ns, and use
20 * Note that the Secure image only requires knowledge of
21 * the beginning of the Non-Secure image (not its size).
42 * - Lowest 256 kB SRAM allocated to Secure image (sram0_s)
43 * - Middle 192 kB allocated to Non-Secure image (sram0_ns)
/Zephyr-Core-3.5.0/boards/arm/nrf5340dk_nrf5340/
Dnrf5340_cpuapp_partition_conf.dtsi13 * Secure image will be placed, by default, in flash0
15 * Secure image will use sram0 for system memory.
17 * Non-Secure image will be placed in slot0_ns, and use
20 * Note that the Secure image only requires knowledge of
21 * the beginning of the Non-Secure image (not its size).
42 * - Lowest 256 kB SRAM allocated to Secure image (sram0_s)
43 * - Middle 192 kB allocated to Non-Secure image (sram0_ns)
/Zephyr-Core-3.5.0/boards/arm/nrf9160_innblue22/
Dnrf9160_innblue22_partition_conf.dtsi13 * Secure image will be placed, by default, in flash0
15 * Secure image will use sram0 for system memory.
17 * Non-Secure image will be placed in slot0_ns, and use
20 * Note that the Secure image only requires knowledge of
21 * the beginning of the Non-Secure image (not its size).
42 * - Lowest 64 kB SRAM allocated to Secure image (sram0).
45 * - Upper 128 kB allocated to Non-Secure image (sram0_ns).
/Zephyr-Core-3.5.0/boards/arm/circuitdojo_feather_nrf9160/
Dcircuitdojo_feather_nrf9160_partition_conf.dtsi14 * Secure image will be placed, by default, in flash0
16 * Secure image will use sram0 for system memory.
18 * Non-Secure image will be placed in slot0_ns, and use
21 * Note that the Secure image only requires knowledge of
22 * the beginning of the Non-Secure image (not its size).
43 * - Lowest 64 kB SRAM allocated to Secure image (sram0_s).
46 * - Upper 128 kB allocated to Non-Secure image (sram0_ns).
/Zephyr-Core-3.5.0/boards/arm/nrf5340_audio_dk_nrf5340/
Dnrf5340_audio_dk_nrf5340_cpuapp_partition_conf.dtsi13 * Secure image will be placed, by default, in flash0
15 * Secure image will use sram0 for system memory.
17 * Non-Secure image will be placed in slot0_ns, and use
20 * Note that the Secure image only requires knowledge of
21 * the beginning of the Non-Secure image (not its size).
42 * - Lowest 256 kB SRAM allocated to Secure image (sram0_s)
43 * - Middle 192 kB allocated to Non-Secure image (sram0_ns)
/Zephyr-Core-3.5.0/boards/arm/nrf9160_innblue21/
Dnrf9160_innblue21_partition_conf.dtsi13 * Secure image will be placed, by default, in flash0
15 * Secure image will use sram0 for system memory.
17 * Non-Secure image will be placed in slot0_ns, and use
20 * Note that the Secure image only requires knowledge of
21 * the beginning of the Non-Secure image (not its size).
42 * - Lowest 64 kB SRAM allocated to Secure image (sram0).
45 * - Upper 128 kB allocated to Non-Secure image (sram0_ns).
/Zephyr-Core-3.5.0/boards/arm/raytac_mdbt53_db_40_nrf5340/
Draytac_mdbt53_db_40_nrf5340_cpuapp_partition_conf.dts13 * Secure image will be placed, by default, in flash0
15 * Secure image will use sram0 for system memory.
17 * Non-Secure image will be placed in slot0_ns, and use
20 * Note that the Secure image only requires knowledge of
21 * the beginning of the Non-Secure image (not its size).
42 * - Lowest 256 kB SRAM allocated to Secure image (sram0_s)
43 * - Middle 192 kB allocated to Non-Secure image (sram0_ns)
/Zephyr-Core-3.5.0/boards/arm/raytac_mdbt53v_db_40_nrf5340/
Draytac_mdbt53v_db_40_nrf5340_cpuapp_partition_conf.dts13 * Secure image will be placed, by default, in flash0
15 * Secure image will use sram0 for system memory.
17 * Non-Secure image will be placed in slot0_ns, and use
20 * Note that the Secure image only requires knowledge of
21 * the beginning of the Non-Secure image (not its size).
42 * - Lowest 256 kB SRAM allocated to Secure image (sram0_s)
43 * - Middle 192 kB allocated to Non-Secure image (sram0_ns)
/Zephyr-Core-3.5.0/boards/arm/bl5340_dvk/
Dbl5340_dvk_cpuapp_partition_conf.dtsi14 * Secure image will be placed, by default, in flash0
16 * Secure image will use sram0 for system memory.
18 * Non-Secure image will be placed in slot0_ns, and use
21 * Note that the Secure image only requires knowledge of
22 * the beginning of the Non-Secure image (not its size).
43 * - Lowest 256 kB SRAM allocated to Secure image (sram0_s)
44 * - Middle 192 kB allocated to Non-Secure image (sram0_ns)
/Zephyr-Core-3.5.0/doc/connectivity/bluetooth/
Dbluetooth-ctlr-arch.rst9 .. image:: img/ctlr_overview.png
44 .. image:: img/ctlr_exec_overview.png
50 .. image:: img/ctlr_arch_overview.png
56 .. image:: img/ctlr_sched.png
62 .. image:: img/ctlr_sched_ticker.png
68 .. image:: img/ctlr_sched_ull_lll.png
74 .. image:: img/ctlr_sched_variant.png
80 .. image:: img/ctlr_sched_ull_lll_timing.png
86 .. image:: img/ctlr_sched_event_handling.png
92 .. image:: img/ctlr_sched_msc_close_events.png
[all …]
/Zephyr-Core-3.5.0/tests/subsys/dfu/mcuboot_multi/
Dnative_posix_64.overlay21 label = "image-0";
25 label = "image-1";
29 label = "image-2";
33 label = "image-3";

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