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Searched refs:RV_OP_STOREREG (Results 1 – 2 of 2) sorted by relevance

/Zephyr-Core-2.7.6/arch/riscv/core/
Disr.S64 RV_OP_STOREREG t2, _thread_offset_to_fcsr(reg) ;\
74 RV_OP_STOREREG temp, __z_arch_esf_t_fp_state_OFFSET(to_reg) ;
78 RV_OP_STOREREG temp, __z_arch_esf_t_ft0_OFFSET(to_reg) ;\
80 RV_OP_STOREREG temp, __z_arch_esf_t_ft1_OFFSET(to_reg) ;\
82 RV_OP_STOREREG temp, __z_arch_esf_t_ft2_OFFSET(to_reg) ;\
84 RV_OP_STOREREG temp, __z_arch_esf_t_ft3_OFFSET(to_reg) ;\
86 RV_OP_STOREREG temp, __z_arch_esf_t_ft4_OFFSET(to_reg) ;\
88 RV_OP_STOREREG temp, __z_arch_esf_t_ft5_OFFSET(to_reg) ;\
90 RV_OP_STOREREG temp, __z_arch_esf_t_ft6_OFFSET(to_reg) ;\
92 RV_OP_STOREREG temp, __z_arch_esf_t_ft7_OFFSET(to_reg) ;\
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/Zephyr-Core-2.7.6/include/arch/riscv/
Darch.h192 #define RV_OP_STOREREG sd macro
197 #define RV_OP_STOREREG sw macro