Searched refs:vector (Results 126 – 150 of 294) sorted by relevance
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38 possible. In architectures where the image must begin with a vector table (such as39 ARM), the descriptors are linked right after the vector table. The reset vector points
154 The minimum value is 17 as the first 16 entries in the vector158 vector table.347 bool "Cooperative sharing of ARC VPX vector registers"350 This option enables the cooperative sharing of the ARC VPX vector
102 * smaller than 256 bytes, but in practice the linker places the vector
11 driver to support these. It will enable MSI-X and MSI multi-vector
82 cmd->cdw11 = sys_cpu_to_le32((io_queue->vector << 16) | 0x3); in nvme_ctrlr_cmd_create_io_cq()
493 qpair->vector = qpair->id; in nvme_cmd_qpair_setup()510 &ctrlr->vectors[qpair->vector], in nvme_cmd_qpair_setup()
112 --vector-map irq_int_vector_map.bin
1242 bool arch_pcie_msi_vector_connect(msi_vector_t *vector,
57 | NVIC | on-chip | nested vector interrupt controller |89 calls a handler directly from the vector table.
79 | SW-based vector table relaying | | Y | Y |…584 Software vector relaying588 chain-loadable images relocate the Cortex-M vector table by updating the VTOR register with the off…589 of the image vector table.592 vector table which remains at a fixed location. Therefore, a chain-loadable image will593 require an alternative way to route HW interrupts and system exceptions to its own vector594 table; this is achieved with software vector relaying.597 it is able to relay exceptions and interrupts based on a vector table600 sequence to set the vector table pointer in SRAM so that the bootloader can602 vector table.
83 uint8_t vector : 8; member
78 local vector table). This footgun is not intended to be
12 - the exchange of the session key and the initialization vector using the Key
35 | NVIC | on-chip | nested vector interrupt controller |
55 ${ZEPHYR_BASE}/include/zephyr/linker/irq-vector-table-section.ld
125 /* Shares vector with ADC1 */
69 | NVIC | on-chip | nested vector interrupt controller |98 calls a handler directly from the vector table.
76 | NVIC | on-chip | nested vector interrupt controller |106 calls a handler directly from the vector table.
128 Ideally we would just pin the vector/handler page in the ITLB in the133 Instead, we load ITLB entries for vector handlers via the refill135 vector page to succeed always. The way to do this is to similarly pin136 the page table page containing the (single) PTE for the vector page in192 (Pedantic note: if the vector page and the currently-executing page
108 # Auto-generate interrupt vector entry
29 | NVIC | on-chip | nested vector interrupt controller |
21 - Additional vector instructions support for AI acceleration
63 Note that NVME requires the target to support PCIe multi-vector MSI-X in order to function.
21 #define _VECTOR_SECTION_NAME vector
29 /* Region of the irq vectors and boot-vector SP/PC */131 * zephyr_linker_sources(ROM_START ...). This typically contains the vector
